新思科技 (SNPS) 2014 Q3 法說會逐字稿

Ladies and gentlemen, thank you for standing by, and welcome to the Synopsys earnings conference call for the third quarter of FY14.

(Operator Instructions)

As a reminder, today's call is being recorded.

At this time, I would like to turn the call over to Lisa Ewbank, Vice President of Investor Relations.

Please go ahead.

Thank you, Rochelle.

Good afternoon, everyone.

With us today are Aart de Geus, Chairman and Co-CEO of Synopsys and Brian Beattie, Chief Financial Officer.

Before we begin, I would like to remind everyone that during the course of this conference call, Synopsys will discuss forecasts and targets, and will make other forward-looking statements regarding the Company and its financial results.

While these statements represent our best current judgment about future results and performance as of today, our actual results and performance are subject to many risks and uncertainties that could cause actual results to differ materially from what we expect.

In addition to any risks that we highlight during this call, important factors that may affect our future results are described in our most recent quarterly report on Form 10-Q, and today's earnings press release.

All financial information to be discussed on this call, the reconciliation of the non-GAAP financial measures to their most directly comparable GAAP financial measures, and supplemental financial information can be found in the 8-K, the earnings press release, and the financial supplement that we released today.

All of these items are currently available on our website at www.synopsys.com.

With that, I will turn the call over to Aart de Geus.

Good afternoon.

I am happy to report excellent fiscal third quarter results.

Customer demand was strong.

We shipped game-changing new products that have already started a multi-year upgrade cycle, and we achieved encouraging results through Coverity, the recent acquisition that expands our TAM into a brand-new software quality, test and security space.

Highlighting our financial results, in Q3 we delivered revenue of $522 million, non-GAAP earnings per share of $0.65 and $340 million in operating cash flow.

For the year, based on the combination of solid organic growth and Coverity results, we are raising the midpoint of non-GAAP EPS guidance to a range of $2.48 to $2.50.

We are narrowing our 2014 revenue range to $2.055 billion to $2.065 billion.

In addition, we are raising our operating cash flow guidance to at least $500 million.

Before moving onto highlights for the quarter, let me comment on the customer landscape.

Semiconductor company results have been trending better over the past couple of quarters, primarily reflecting good production volumes.

At the same time, stress levels have not really changed.

Semi and systems companies worldwide face significant challenges, how to deal with global economic caution, and navigate a very competitive market, while meeting unprecedented technical mandates in both hardware and software.

The result is that both vertical and horizontal consolidations, be it by acquisition or by divestiture have continued.

While this dynamic is not new, it makes semiconductors an evolving yet exciting industry.

From a design perspective, the state of the art push into smaller dimensions and much larger transistor counts continues unabated.

Since these chips provide an enormous amount of computer power, both the amount of embedded software and the number of new software applications are growing at an impressive rate.

Synopsys is uniquely positioned to be a partner of choice for companies facing these challenges.

[For needed] chip implementation, we have a comprehensive solution for verification that reaches all the way up to the intersection of hardware and software.

We are the number two IP company in the world, and with the acquisition of Coverity, we have not only significantly expanded our portfolio and customer base, but are transforming Synopsys into its next incarnation.

Let me now focus on highlights in the different areas, beginning with core EDA.

Looking at the implementation flow, one recognizes three technical segments.

First, the finFET-based leading edge designs ranging from 22-nanometer down to test and early production designs at 10-nanometer.

Second, the grouping centered around 28-nanometer including 45 and 20 designing very advanced chips, but holding back to jump into finFET until processes mature a bit.

And lastly, designs in established nodes ranging from 55 to 350-nanometer, and often specializing in applications requiring more analog, high-voltage or other market-specific demands.

Synopsys is strong in all three categories, with leadership especially visible in the first two.

Commenting on the extremely fast growing finFET segment, it's quite astounding to see how intense the competitive battles are along the silicon providers, and how fast the node succession from 22 to 16, 14, to 10-nanometer is progressing.

Synopsys has invested for almost a decade in this area.

Our latest count, we are already tracking over 150 finFET designs and tapeouts worldwide.

Synopsys is integral to more than [95]% of them.

Clearly from a technical point of view, Moore's Law is alive and well, and Synopsys is central in driving it forward.

During the quarter, we announced broad foundry support for Intel's 14-nanometer Tri-Gate platform, extending our production-proven 22-nanometer design enablement through this process.

Already heavily used to design Intel's own production Tri-Gate chips, Synopsys' broad offering of digital and custom-designed tool, digital and analog simulation, as well as memory and interface IP enables Intel's foundry customers to be confident in their ability to design very advanced chips.

We also announced broad finFET collaborations with Samsung and TSMC, including availability of a wide range of design tools and IP.

Touching all three segments, our custom and mixed-signal tools are making solid progress, specifically the integration of IC Compiler and custom router, is seeing excellent success with customers needing to bring digital and analog designs together.

At the Design Information Conference, for example, for Fujitsu and Renaissance highlighted 4 to 15 [times] productivity gains, and our solution is already being used in more than 50 tapeouts.

Based on intense customer interest across the design spectrum, the introduction of our new IC Compiler II is clearly the highlight of 2014, and a milestone in design automation.

This next-generation tool delivers an astounding 10 [times] improvement in throughput.

That is 10 [times] not 10%.

Since announcing IC Compiler II in March, we delivered its production version exactly on schedule last month.

The number of customer engagements has grown very rapidly, and we have booked our first orders.

So far the accelerating number of tapeouts has been in 40, 28 and 16, 14 finFET design.

And the first chips have already successfully come back for manufacturing.

Let me give you a sense of the impacts customers are already seeing with IC Compiler II.

Last week, a very important customer reported that to their own astonishment on a large block of one of their most advanced chips, the difficult placement and clock optimization runtime which is typically about 45-plus hours for them, with IC Compiler II to came down to an amazing 6.5 hours.

Needless to say, this is not only a fabulous productivity increase, but also allows the design team to now do multiple integrations per day.

We expect IC Compiler II adoption to begin a broad ramp-up in 2015.

The thus enabled massive growth in chip and system complexity puts the spotlight squarely on verification, where we also made great progress with the Q2 announcement of verification compiler.

Shown to deliver 3 X productivity improvements, verification compiler features brand-new core technologies in static and formal verification, the integration of software-based simulation and debug tools, as well as key verification IP all in a single product.

Interest is even higher than expected, leading to a solid pipeline and orders already in hand.

As customers understand the impact of what Synopsys is doing in verification, we have had a number of key commitments to long-term collaboration in this area.

Overall in core EDA, we see a lot of activity, and expect generally low to mid single-digit organic growth on a multi-year basis.

Now turning to IP and prototyping.

In IP this quarter, we note a number of successes with both current and next-generation products.

We see significant USB 3.0 traction, as some major customers are well into volume production, while others are ramping up new design efforts.

We estimated that 100 million Synopsys (inaudible) USB 3.0 based chips have shipped thus far.

During the quarter, we unveiled the industry's first complete PCI Express 4.0 solution, targeted at enterprise computing applications such as servers, networking and storage systems.

We are doubling the performance over the previous standard.

Most importantly in Q3, we also launched IP accelerated.

After pioneering IP-based design for almost two decades, several years ago we set out to transform IP integration, and make it radically easier for designers to benefit from third-party IP.

Along with the IP, we are now delivering a complete set of models, FPGA prototypes, test structures, driver software, and a host of other integration mechanisms.

This complete solution not only speeds up the integration of large quantities of IP, while reducing the risk of costly errors, but it also accelerates the essential path to software.

IP accelerated sets the bar for sophisticated IP and directly impacts designer productivity and success.

The reception from customers has been excellent.

On the prototyping side, demand for HAPS FPGA products is driven by the steeply increasing need for hardware software integration, which brings me to the new software space that we entered with the acquisition of Coverity.

This market is characterized by a $500 million TAM, high growth, an imperative for companies of all sizes developing software, and a great potential for Synopsys.

Coverity provides the essential testing software used during co-development to find and fix critical defects.

Defects not found during development are much more expensive to find in the quality assurance phase.

Defects not found at all can jeopardize the quality or security of a product.

While we are still in the early stages of building this business, I do have some highlights to share.

In the first two months, Coverity is right on track financially.

As a reminder, we indicated last quarter that we expect Coverity to contribute $20 million to $25 million in revenue, and to be $0.10 to $0.13 dilutive in FY14, due to the deferred revenue impact of purchase accounting.

We expect this part of our business to reach breakeven in the second half of FY15 and be accretive in FY16.

While Coverity did a great job building a $75 million standalone company, combining with Synopsys, one of the largest software companies in the world, brings new benefits to target customers.

In one interaction with a major global energy company, their management indicated strong satisfaction that this mission critical software is now coming from a large company with financial strength, stability and long-term vision.

Recall that half of Coverity's customers are brand-new to Synopsys, representing a completely new pool of potential buyers.

The other half are companies we know well, but where Coverity is used in different parts of the Company, and accessing different budgets.

We have spent the last several months, focusing on bringing in business, and assessing the go-forward strategy.

We anticipate sharing more with you over the next couple of months; please stay tuned.

IP and software solutions contribute approximately 25% of our revenue, and we expect to see low double-digits revenue growth on a multi-year basis.

In summary, we executed well in Q3.

We solidified the year's financial outlook with an excellent quarter, and raised operating cash flow guidance.

We delivered game-changing technology that extends our competitive differentiation for years to come, and we made good progress on our new journey into the software quality, test and security market with Coverity.

Let me now turn the call over to Brian Beattie.

Well, thank you, Aart, and good afternoon, everyone.

In my comments today I will summarize our financial results for the quarter, and provide you with guidance for Q4 and the full year of 2014.

In my discussions, all of my comparisons will be year-over-year, unless I specifies specify otherwise.

Now Synopsys delivered an excellent quarter, meeting or exceeding all of the quarterly financial targets we provided in May.

Q3 financial results were highlighted by strong business levels, solid growth in both revenue and earnings, and considerable cash flow generation.

Total revenue was $522 million, an increase of 8% compared to a year ago, and as expected revenue from Coverity product sales was modest reflecting the post-acquisition purchase accounting haircut to deferred revenue.

About 90% of Q3 revenue came from beginning of quarter backlog, and we had one slightly greater than 10% customer.

The weighted average duration of our renewable customer license commitment for the quarter was about 3.1 years, and we continue to expect weighted average duration for FY14 to be approximately three years.

Turning to expenses, Q3 total GAAP costs and expenses were $455 million, which included $33 million of amortization of intangible assets, and $21 million of stock-based compensation.

Q3 total non-GAAP costs and expenses were $397 million, slightly below our target range, driven primarily by timing of quarterly expenses, including some delayed hiring along with overall cost control.

Non-GAAP operating margin was 23.9% for the quarter, and 23.5% for the first three quarters of FY14, reflecting increases in headcount and expenses from our recent acquisitions primarily Coverity.

Our ongoing goal is a continued focus on operational efficiency with annual non-GAAP operating margins moving solidly into the mid-20%s.

Turning now to earnings.

GAAP earnings per share were $0.42, with non-GAAP earnings per share at $0.65.

Q3 non-GAAP tax rate was 17.5%, reflecting our release of certain reserves due to the lapse of several statutes of limitation during the quarter.

As a result, we think that a non-GAAP tax rate of approximately 20% is a reasonable estimate for FY14.

So now turning to our cash flow.

During the quarter, we generated $340 million in cash from operations, and are raising our operating cash flow target for the year to at least $500 million.

We paid back our outstanding $200 million revolver along with $7.5 million of our term loan, leaving $83 million of debt outstanding on the term loan.

Consequently, we did not repurchase stock in the quarter.

However, for the trailing 12 months, we have spent $155 million repurchasing approximately 4.1 million shares, and we have $420 million remaining on our current share repurchase authorization.

We ended the quarter with cash and cash equivalents of $903 million, with 12% or $109 million onshore and 88% offshore.

We plan to continue optimizing use of our strong cash flow, through a balance of M&A, stock buybacks and debt reduction.

Each quarter we will evaluate the best uses of cash, but our ongoing goal is to allocate capital to where we think it can generate maximum long-term shareholder value.

DSO was 42 days, reflecting strong cash collections and timing of invoices, and we ended Q3 with 9,225 employees, with more than one-third in lower cost geographies.

So now let's address our fourth quarter and FY14 guidance, which excludes the impact of any future acquisitions.

So for FY14, we are narrowing our revenue range to $2.055 billion and $2.065 billion.

While we are not breaking out Coverity product sales, we are on track with expected $20 million to $25 million of revenue in FY14.

Other income and expense between $10 million and $12 million, a non-GAAP tax rate of approximately 20%.

Outstanding shares between 155 million and 159 million.

GAAP earnings per share of $1.57 to $1.63, which includes the impact of approximately $80 million in stock-based compensation expense.

And we are increasing the midpoint of our non-GAAP earnings per share target, with a range of $2.48 to $2.50, which reflects Coverity on track for the expected $0.10 to $0.13 dilution in FY14.

Capital expenditures of approximately $105 million, slightly less than originally anticipated due to some shifting out of expenditures to build out our newly released Bay Area facility.

And again, we are raising our cash flow from operations target to at least $500 million for FY14.

For the fourth quarter of FY14, our targets are, revenue between $537 million and $547 million, GAAP costs and expenses between $462 million and $479 million, which includes approximately $22 million of stock-based compensation expense.

Total non-GAAP costs and expenses between $410 million and $420 million, reflecting traditionally higher Q4 expenses; other income and expense between $1 million and a negative $1 million; non-GAAP tax rate of approximately 22%; outstanding shares between 155 million and 159 million; GAAP earnings of $0.32 to $0.38 per share; and non-GAAP earnings of $0.59 to $0.61 per share.

We also reiterate our multi-year goal of high single-digit non-GAAP EPS growth.

We continue to believe that this strategy will deliver long-term shareholder value.

It allows us to not only fund our strategic growth areas, and expand our technology leadership, but simultaneously drive sustainable long-term growth and increased profitability.

So in summary, we are very pleased with our strong Q3 results, highlighted by solid top and bottom line growth, and considerable cash flow generation.

And with that, I will turn it over to the operator for questions.

Certainly.

(Operator Instructions)

Rich Valera, Needham & Company.

Thank you.

Aart, just wanted to get your take on any incremental change if you seen any in the environment.

It sounds like it's pretty similar to what you were describing last quarter, but just wanted to hear it from you, what if anything, you are seeing incrementally relative to last quarter?

Sure.

So in general, my own perception is that things have not really changed all that much, because the major forces in the semiconductor industry are essentially the same than they were a quarter ago.

At the same time -- and you would see that from many of the analysts, everybody is reporting slightly better numbers, slightly higher expectations.

And that, of course, is a good sign, but given that the fundamentals from my perspective have not changed all that much, I think -- steady as she goes.

Having said that, what is very, very positive is, I think that's the acceleration of the finFET side gives more and more credence, that there is a whole wave of new capabilities coming.

And as finFET technology manifests itself in more domains than just the advanced computation, the advanced graphics, the -- all of the advanced heavy computationally-centered chips, I think that will fuel really, the next wave of growth, and many companies are very much aiming at consolidating their business picture to be ready for that.

That's helpful.

A question on IC -- ICC II, I think the way you have described it in the past is that ICC II is for your customer, at advanced nodes that would really benefit from the improved performance there.

While those at some of the trailing nodes that may not need it as much, wouldn't necessarily choose to upgrade.

Can you give us a sense of how you see your customer base percentage-wise, like what percent do you think is at sufficiently advanced nodes that they might or would upgrade ICC II, versus those that you don't think will?

Do you have any sense of that percentage?

So let me first, half agree and half disagree with you.

Let me start with agreeing completely, with the fact that all the people working on the very advanced nodes absolutely will upgrade as soon as they can to IC Compiler II.

Because the capabilities that are in there, that are necessary for finFET at 16, 14, and for sure at 10-nanometer, are of extremely high value.

And simultaneously, the fact that the chips that you will do there will have so many more transistors, therefore are of so much higher complexity will require the strength that the engines have, that are in IC Compiler II.

The part where I maybe, humbly would re-vector your thinking is actually on all the existing nodes.

One of the things that is quite remarkable, and we have now many experiments to show this, is that by using the capabilities in the most advanced tools on much more well-established nodes, and that can be a 45 or 65 or even older nodes than that, result in much better results on those chips.

And we have done a number of AV comparisons, where we have taken chips that had been designed in the past, and just re-run them with the new tool.

And in a number of situations, we can do the very same chip with fewer layers of metal.

Well, one has to appreciate what that means, fewer layers of metal means significantly lower cost manufacturing.

And so, the reason for this is, not only are there many new deep technical features in IC Compiler II, but in order to deal with the complexity, the engines have been massively overhauled to be much faster than before.

And therefore, we can do computations that in the past we couldn't do.

So I think the impact, while maybe not as urgent as on new nodes, will be very quickly visible in the coming year to people doing more established design.

And I guess, I will just try to ask the question again, just in terms of percentage.

So it sounds like even folks at say, 65 could see significant benefit.

Do you have a sense of your user base at 65-nanometer and below, or do you think about your base that way?

Yes.

So actually, we think of it really in sort of three categories.

I tried to hint at that in my preamble, which is really the finFET which is clearly very advanced.

Those people will all go.

The group around 28, which is -- I stretch it a little bit from 45 to 20, to really cover all of the high-end planar transistors.

I think they will all go.

And I think the nodes before that, people will gradually go over time, and we will try to incentivize them in a number of years to make sure that they all go.

And in terms of the percentage of your customer base that is comprised -- comprises 45 to 20?

Oh, 45 to 20?

I would say, all of the advanced people are there, because all of the advanced people do designs there, and some do a portion at the finFET level.

And clearly, I would guess, that certainly well over 50% of our revenue sits there.

Great.

And just one more for me.

I don't think you meant this to be a change, but in your description of core EDA, you talked about a low to mid single-digit core EDA growth.

Is that -- I think -- I thought maybe in the past, you talked about the low single-digit -- I am not sure, if low to mid is the same or if it is different, just wanted to clarify that?

Yes, there is no change.

No change intended in any case.

Okay.

Thanks very much.

Appreciate that.

You're welcome, Rich.

Krish Shankar, Bank of America Merrill Lynch.

Hello, thanks for taking my question.

I just had a couple of them.

One is for Brian.

So if you just do the midpoint of the guidance for fiscal Q4, the EPS comes around $0.63.

So I am just kind of curious, what is going on in your assumption on getting to the bottom line for Q4?

Oh, well, again, we have had -- coming off a very strong Q3, where we saw again our run rate increase during the quarter, and even forecasting additional revenue growth going into the fourth quarter.

So good performance, good year-over-year, nice sequential revenue that we are anticipating, as I built that into the revenue guidance.

And then on the spending profile, we also see some growth.

We managed expenses very tightly during the quarter.

We had some level of deferred hiring if you like, that will come in into the fourth quarter, and just managing expenses.

So we are seeing expenses pick up a little bit, very traditional for us in the fourth quarter to see that profile.

So overall, just a reminder, we have increased the midpoint of our EPS guidance from last quarter by about $0.015.

So overall again, a good strong year, making the commitments we committed to at the beginning of the year, and continue to grow through.

Got it.

And then, your full-year guidance is roughly around $2.50 in EPS, and earlier in the year it was almost $2.60, and the $0.10 dilution from the accounting with Coverity.

Right.

And you also mentioned, that you didn't expect to grow EPS in the high single-digits kind of range.

So without giving any guidance -- and I know you are not going to guide for next year yet -- should we assume the high single-digits growth for EPS from the $2.50 base or a $2.60 base for on -- for next year?

Well, again, in terms of our commitment, and we have made this for many, many years now, just our ongoing multi-year commitment of high single-digit earnings per share growth, and clearly, of course, we are focused on growth.

And the impact we had anticipated for this year, plus the impact of what we saw from Coverit, brought us to a lower number.

But we wanted to highlight that even without that acquisition, we would be just over 7% earnings per share growth on a year-over-year basis.

And any commentary now on 2015 is really exactly the kind of work we are undertaking right now, of getting ready for our plans of getting that set up, and to be able to communicate as we normally do on the very next earnings call, on our anticipation and guidance for 2015.

Got it.

And a final question for Aart.

I am kind of curious your -- any updated thoughts on capital return in the form of either dividend or more aggressive buybacks?

And along the same path, if you still think the best value is from M&A?

Is there any pocket that makes more sense for you?

In other words do you think you get best bang for your buck in doing acquisitions in the IP side, or is there anything else?

If you can give us some insight that would be very helpful.

Sure.

The capital allocation is something that really gets looked at every quarter again, although we sort of follow general principles.

Which is the highest weighting is given to the opportunity of doing M&A that transforms positively the Company for the future, because capital is very valuable asset.

And given that it is split in domestic and international, one has to actually navigate through fairly careful waters.

The second application of the capital would be for buybacks.

And in the last 12 months, I think we have done $155 million or something like that.

Last quarte, we didn't, because we did the Coverity acquisition and we paid back the debt that came with that.

And in general there, our sense is that we would like to keep the ability to have that, so that we have optionality in case good opportunities come up.

And otherwise, we are just disciplined And lastly, dividend is something that we have not considered.

We think the other two ways of using the capital base are better.

Thanks, Aart.

You're welcome.

Sterling Auty, JPMorgan.

Yes, thanks.

Want to start with the contract duration.

I think the 3.1 years, that is a pretty healthy jump.

Wondering if that is a couple of contracts that skewed it, or did you see that lengthening across the spectrum of contracts in the quarter?

Yes, good question, Sterling.

The commitment we always make each year, is that we expect our average duration of our license contracts to be about three years.

We have been running a little bit less than that during the first two quarters.

The last quarter was really related to one significant deal that came in, that had a longer duration to it.

So all of that, as you know we break it out to effectively one decimal point, and that came out at 3.1 years.

So again, we reiterate about three years is the appropriate duration, and that is what we are on track to deliver in 2014.

And can just you maybe describe how that may have impacted your -- that longer contract length, how that may have impacted your revenue outlook here for the fourth quarter, given you are spreading it out over a longer period?

It doesn't affect it.

Right?

We do look at that revenue run rate, which again, we said was up in the quarter.

And as we look at a longer-term deal, it's just one specific deal that came through, and a good deal for everyone involved.

And again, that just factors into revenue guidance going forward.

And can you give us a sense on, Aart, you mentioned finFET opportunity.

What is finFET doing to the IP business?

It is actually driving a lot of IP business, because if you take one step back -- in order for a foundry to be successful with a silicon offering, there are many things that have to come together.

And, of course, they themselves are in charge of the technology, the transistor development, the manufacturing capabilities and the manufacturing capacity.

But they also rely on others such as Synopsys to do at a minimum of two or three things.

One is to make sure that the tools are completely ready for whatever idiosyncrasies the technology may have, and they all have idiosyncrasies and these are very important.

Secondly, they want to make sure that libraries and memories, which are very closely related to the silicon already, we have a business there, and we are very involved in providing those cores to the foundries at an early state because otherwise they cannot go to market.

Then there is all the other IP, the interface IP and other providers provide processor cores and graphics cores that have to get ready.

And lastly, we provide a substantial amount of methodology help, so that a customer can start designing, and the whole flow is ready and proven and so on.

And so, the very fact that there is such a push on advanced finFET has brought a wave of work on us.

Now you would say work, that is a negative No, it is a positive.

It is an opportunity to drive the state-of-the-art forward, and we are very deeply enmeshed in that.

In that sense, the finFET wave from my perspective is another easy 10 years -- well, easy is the wrong word, guarantees 10 years of Moore's Law, and we are very involved in making that happen.

Okay.

And last question, Brian, on the non-GAAP sales and marketing expense -- I think it was $107 million.

That was a few million dollars shy of what we were thinking, and looking at the sequential change in it may have come in below what I would have thought.

Anything that you didn't do in the quarter, whether it be from advertising or marketing or headcount, what kind of explained the sales and marketing result?

Delayed hiring.

It's all about the -- looking very carefully at all the planned growth, and really kind of fine-tooth comb on what is available, what is coming in, what is essential and just managing it very carefully.

So again, just timing relative to bring that in and managing costs.

Got it.

Thank you.

You're welcome.

Tom Diffely, D.A. Davidson.

Yes, good afternoon.

First, Aart, I was hoping on a question on IC Compiler II.

So after the first quarter, what kind of feedback do you get from the customers as far as taking this market-leading product and making it 10 times faster.

What kind of impact do you see on just the market size?

Well, I think this is a great opportunity for us, because it's not just the product.

It is really a platform that touches many other capabilities and products.

And when we say there is 10 times improvement in throughput, throughput, it really implies through many, many different tasks.

And so, we have now many reports from customers on all kinds of different tasks of the runtime improvement.

And it is more difficult for customers to judge what happens when you go through all of the stages, because that implies going through an entire chip design.

But for each of the tasks, they are seeing remarkable improvements in runtime.

And in my preamble, I tried to use one example of where runtime is not just a -- well, it goes faster.

It is a, now I can do it two or maybe three times a day.

And one should not underestimate how valuable that is, because that allows people to look at results and say, oh, no, I should have changed something to get better results.

And they can immediately go back into implementation, and thus progress faster towards their overall chip.

So the result of all of this is that, I think it is not only the tool that is needed to really anchor the design of the next generations of technology, and I would certainly include 28-nanometer in that.

It is also the basis to change design methodology.

And it is almost fun to hear some of the customers say, well, now that this is so fast, why don't you make everything else faster too?

And so, the usual when you have something good, immediately the expectations go further up.

So you think essentially the result is more testing versus fewer seats or fewer packages?

When you say more testing, you mean there is the opportunity to explore many more designs much more rapidly.

(Multiple Speakers) Yes.

Okay.

Okay.

I was just kind of curious if that -- maybe you thought that once you had a slug of refresh go through with your customers, if at that point the speed actually would decrease the market size.

But it sounds like you think there is so much more -- so many more cycles you can do to get the reliability up, that would --?

Oh, absolutely.

I think, we often don't realize how enormously the complexity of chips is increasing.

And partially, we take it for granted, because our entire industry actually delivers incredibly well against this mythical Moore's Law, but the fact is the chips that are being built are enormously complex.

And the fact that, entire phases of this have been automated to this degree is remarkable.

And I have no doubt whatsoever that the fact that the products run so much faster, just means that they will see more utilization on more products.

Okay.

All right.

That's helpful.

And then Brian, when you look at the Coverity acquisition and the fact it is dilutive until the second half of next year, is that driven by just the deferred revenue makeup, or do you need actual growth in Coverity proper to get to accretion?

Well, yes, the reason for that dilution is really, all related to the deferred revenue haircut.

And it does effect, as you know with a ratable model beyond just this year, it does go into next year as well.

So from a cash flow perspective, the Company is breakeven.

From an earnings perspective prior to acquiring it, it was a breakeven business, coupled along with a very nice roughly 20% revenue growth associated with that.

So we do plan on growing that business, growing the market potential that is there, and also to drive profitability up over time.

But really that biggest impact to your question is really coming from the deferred revenue haircut.

Again, it's a non-cash item -- cash flow, the Company is doing very well.

Okay.

I just wasn't sure if you were putting enough extra investment into it, whereas the current revenue run rate, it wasn't quite profitable yet.

Yes, we are building that in, as well as a look ahead.

Okay.

Thanks.

And then I guess, Aart, a final question.

When you look on a question when you look at the emulation market, I guess two questions there.

First one, do you think it is ultimately a $1 billion market like some are saying at this point?

And your second question is, is this one of your key focuses at this point?

Well, $1 billion is a pretty from pretty far away from where the market is today.

On the other hand, I think there is plenty of indication that faster and faster simulation requires hardware, and emulation is a central piece of that.

And one of the key reasons for that is tied actually to the previous comment on complexity of chips.

Which is when you look at the advanced chips, what is customary today is to have 1, 2, 4, 18 -- God knows how many compute cores.

Well, the implication is having processor cores, means there is software that goes with that.

Having software means that you would like to verify that software in the context of the chip, without having the chip.

And this is where both emulation and FPGA-based prototyping are absolutely essential.

And so, I see the entire market engineerin,g putting more and more emphasis now on this intersection between hardware and software.

And it is in that context, that emulation has certainly very high potential as we are looking at system validation, which contains both hardware and software.

Okay.

Well, thank you both for your time today.

You're welcome.

Jay Vleeschhouwer, Griffin Securities.

Thanks, good afternoon.

Brian, first a question about the results, and then Aart, couple of longer-term questions.

Brian, could you comment on the unusually large sequential increase in revenues in North America, while at the same time you also had a fairly large sequential decline in Asia-Pacific in the second quarter.

Perhaps the latter is seasonal because you had something similar last year.

But what are the moving parts behind those two large moves in sequential revenues geographically?

Yes, again, all of this under a very, very ratable revenue profile.

So as you know, from time to time, there is a little bit of revenue variability.

We have addressed that in Asia-Pacific before, just relative to one contract that is in place.

It just moves around a little bit from quarter-to-quarter.

So again, no -- it is just a continuation of a trend on a quarterly basis.

Everything is totally on track.

And as you are seeing in Asia-Pacific, our trailing 12 months revenue is up 15%, compared to 12 months earlier, so good performance through the whole region.

And then just relative to North America, again, you are going to see the same thing, now with Coverity starting to kick in, and some additional specific businesses that we have, it is a good quarter.

Overall, the business did well in North America in particular, just looking at some record results for the US right now.

Okay.

Aart, with respect to IC Compiler II, when the Company hosted a meeting with investors at DAC, there was an interesting discussion about the node-based pricing that you have offered or introduced with IC Compiler II, with different capacities and prices having to do with the node for which the product would be used.

Could you talk about whether that kind of approach to pricing is usable for other of your tools?

Is that something you are planning to do?

Also technically, would it be fair to say that you are working on, or maybe you have already finished it, increasing the capacity for DC commensurate with the capacity increases for IC Compiler II?

Okay.

Let me start first with the overall pricing.

Attaching anything to nodes, either very, very directly or through very specific features that are necessary for those nodes, applies much more to the implementation tools, than let's say the verification tools.

Because the implementation tools actually need to know what node it is, where the verification tools in general treat a gate as a gate as a gate, no matter what transistor is made up of.

And so, in the case of our advanced tools and implementation, there a lot of this can be regulated or controlled really through the features that are available for the different nodes.

Remind me, what was your second question?

Sure.

There was some discussion at DAC that just as you have increased the capacity for IC Compiler II --

Yes.

Yes, of course.

Relative to its predecessor, you might need to increase DC capacity similarly?

Well, yes and no.

The yes part is, no doubt that all the building blocks that are being created are growing commensurately with the chips that are growing.

And so in that sense, there is a never-ending push on all of our tools as a matter of fact to increase capacity, or another way we say it, is reduce the memory consumption per gate or per transistor.

And so, that will continue on all of our tools.

The only thing that is slightly different between tools that look at the placement out of an entire chip, versus the synthesis of individual blocks, is the entire chip grows in absolute terms even more than the individual blocks.

The other area where -- what you just said is very material -- is actually in the verification side.

And there too, the push for both faster and lower memory utilization is remarkable.

On the faster side that is, of course, is what results into the push into emulation and FPGA-based prototyping.

But the good news is, I think we are never done with the engineering that we have to do, and Synopsys is well-differentiated in all these angles already.

Okay.

Maybe lastly, thinking about longer-term incremental opportunities for you specifically, but perhaps more broadly for EDA, could you address those opportunities in three respects?

One, by functional area particularly focusing on the opportunities you see in sign-off and power -- you were quoted, I think it was at the DAC, maybe it was at SNUG, that power has its own specific optimization requirements.

So maybe you could talk about that?

Secondly by customer type, in your prepared remarks you talked about foundrie,s and specifically Intel custom foundry, maybe talk about the opportunity there?

And then lastly by end application, at the breakfast you hosted with global foundries at DAC, someone from Synopsys was quoted as saying, that you are very aggressively pursuing the Internet of Things opportunity.

So perhaps you could talk about what that really means for you?

Well, realize, of course, that you are asking me to do multiple complete SNUG speeches here, but let me start a little bit by the functional area.

Top down, we break our thinking into really only three or four areas, the implementation, the verification, the IP, and now the interaction hardware software-to-software.

On the implementation side, you are absolutely right to highlight power, because power touches everything.

And when I say everything, I really mean from the most minute microscopic optimization of transistors that are done with TCAD, to the very choice of the materials.

And that is why you see so much emphasis in these new finFET structures all the way to, of course, how a chip is designed, the architecture, but then also how the software is run.

And the very fact that on a modern chip, as you run software, pieces of the chip are being turned on and off thousands of times per second, just to save a little bit of power gives you a sense of how important that is.

And so, the key for us is to make sure that all of our tools understand reasonably well what the other tools are doing.

In terms of the customer types, one can certainly look at the people providing the silicon, so the foundries or some of the IDMs that do it themselves.

And there one needs to be engaged early on, having the right connections to what will describe the technology, so that the tools can use it well, and be ready with the early IP.

But just as important on the receiving end, so the people that may be fabless or design companies, there the goal is to help them make maximal utilization of the technology the minute they are available, and the minute they are economically interesting to them.

And the good news there is we have quite a number of substantial, large, hard driving fabless companies that have teamed up with us, on really driving the state-of-the-art forward.

And then in terms of end application domains, it is useful to understand what are the biggest markets, because the biggest markets are your computation and communication.

They intersect very much on the Internet, which means that the cloud infrastructure is an area that keeps being invested in.

And everything I mentioned so far, demands state-of-the-art technology going forward.

Internet of Things right now is a little bit of catch-all for so many different things.

Somebody the other day joked that every time you say the word, Internet of Things, the market grows by another trillion or so.

Well, I think it Is not that simple.

There is going to be enormous large number of very simple chips collecting data, measuring things, watching things, And then the manipulation or the intelligent analysis will demand more and more chip and silicon technology in years to come.

And so, I think there are many open opportunities there, but it is also many specialties, people that are really very good at doing something high voltage or low voltage, or that are looking fOR analog capability.

So I think there is a broad horizon, and the Internet of Things is sort of the door to getting a lot of information in.

But the hard-core is all around computation, and the transportation and storage of data, as all the advanced companies are massively betting on that.

Mahesh Sanganeria, RBC Capital Markets.

This is [Shong Yen] asking for Mahesh.

Thanks for taking my questions.

And Aart, you talked a lot about finFET progress in your prepared remarks which is very helpful, but I wonder if you can talk about -- excuse me -- the development on the FD-SOI side, what level of interest or traction do you see in that area, and how Synopsys plans to address the demand there?

Okay.

Let me go backwards with that, which is, we have been very competent on FDA, FD-SOI for actually quite a while, and the majority of the chip that have used that technology were taped out with our tools.

Now the reason FD-SOI has come to the attention of a number of people is, of course, because there has been an agreement between [ST] and Samsung to invest jointly in that area.

They will have to tell you exactly what they plan to deliver.

But FD-SOI brings some of the promises of lower power to the 28-nanometer planar transistor wave.

And so, the way to understand this is down to 28, 20-nanometer transistors have been planar, read that as flat.

FinFETs are vertical transistors.

Vertical, as you would imagine are more difficult, more expensive to build, but they have the benefit of having much lower power consumption going forward.

And so, it begs the question, well, when do you stop 28, 20, and when do you jump over to the next wave?

And quite a number of companies are right now essentially using 28-nanometer to the best of their abilities, until finFET becomes economically more mature.

And there has been the proposal to use FD-SOI as a way to get even better results out of 28 for a lower price.

And so, ST has had excellent results with this, so it's promising.

But it -- the question remains, will there be broad foundry capacity for that?

And if, yes, I am sure some customers will use it.

Okay.

Thank you, and there are five minutes remaining in this conference.

The next question comes from the line of Monika Garg of Pacific Crest Securities.

Hello, thanks for taking my question.

This question is to Brian.

Brian, if I look at the tax rate, the tax rate quarter-over-quarter for the yearly basis has gone down by 100 basis points, right?

Which adds [$0.03] to [EPS].

Then you had a nice [beat in Q3] by $0.05, but you are only raising your yearly guidance by a couple of cents.

So could you help us reconcile that?

Sure.

Yes, and I will confirm the data points too.

We have had a very good third quarter with our tax rate coming in, reflecting a number of statutes of limitation so just really expired in our third quarter.

And in that quarter is basically a year-to-date catch-up if you like, and that has to flow through into our results.

So that was a contributor into the earnings, as we were able to release some reserves we had set up.

Our prior guidance on our tax rate for the year was 21%.

And now with those provisions coming in, we are letting that go down to 20% for the year.

So again, that is being reflected in our guidance as we look forward.

Relative to our guidance for the full year, we have included a $0.015 increase.

As we said we did really well inside the third quarter, and just looking at our typical fourth quarter with rising revenues, we also see some rise in our expenses associated with the cost controls, and some delayed hiring we had in the third quarter.

So overall good management of tax, and again, good earnings per share with some improvement in that now being forecast.

And then I have a question, you have seen consolidation in the semi industry, right?

Broadcom kind has announced they are winding down their (inaudible) business.

Could you maybe talk about -- draw a trend consolidation in semi, then maybe [as in EDA] and also in Synopsys?

Well, this is why before, I mentioned that I think the market has not changed all that much.

These consolidations in semiconductor side are not new, and I think are just the natural evolution of any industry that periodically sort of re-centers itself on critical mass, be it either vertical focus or horizontal focus.

And I think it shows that we have a very active and alive industry.

This is not any different for our own industry.

There has been consolidation in the past.

I think we are, certainly Synopsys is in a position where we have a very good position, and have had the opportunity to now look at broadening fields.

And as you know, one of the acquisitions we did was Coverity that opened up a new TAM for us that previously was not there.

So there is plenty of opportunity for us to look forward.

But in general, we don't comment about forward-looking M&A for the Company.

The last one for me, on the [emulation] side, you have new tool, the [emulation] tool in March of this year.

Could you maybe talk about how you think that is doing and the growth, what you are seeing in the segment?

Yes.

So we introduced ZeBu 3, which is a brand-new generation, much faster much higher capacity engine, and actually it has gotten very good reception from customers.

A number of them have been shipped and are in utilization.

This is part of a much broader strategy, which is really to deal with the very fact that verification is absolutely one of the areas that will see the biggest demand in new capabilities, faster speed, higher capacity, et cetera, because of the complexity of not just the chips, but of the entire system and the interaction with hardware and software.

And so, in that context, we are very happy that the new machine is in good state, and our focus is entirely now on the interaction between that and our other tools.

And we will tell more about that in -- towards the rest of the year.

Thank you.

That's all for me.

You are welcome, Monika.

Okay.

Thank you, and back to you, gentlemen, for closing remarks.

Well, thank you very much for spending time with us.

We are looking back on a very strong quarter, not only with good financial results, but also with some advances with very high impact long-term products.

And so, it will be exciting to tell you about our progress in the coming quarters with these products, and their impact on the semiconductor evolution and history.

Thank you so much.

Okay.

Thank you, and that concludes our conference for today.

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