Peraso Inc (PRSO) 2010 Q2 法說會逐字稿

Good morning and welcome to the MoSys second-quarter 2010 financial results conference call. At this time all participants are in a listen-only mode. At the conclusion of today's conference call instructions will be given for a question-and-answer session. (Operator Instructions). As a reminder, this conference call is being recorded today, Friday, July 23, 2010. I would now like to turn the call over to Beverly Twing of Shelton Group, the investor relations agency for MoSys. Beverly, please go ahead.

Thank you. Joining me on today's call are Len Perham, MoSys' President and Chief Executive Officer, and Jim Sullivan, Chief Financial Officer. The second-quarter 2010 financial results press release was distributed earlier and is available on the MoSys website at www.MoSys.com.

Before we begin today's discussion I would like to remind everyone that this conference call will contain forward-looking statements based on certain assumptions and expectations of future events that are subject to risks and uncertainties.

Such statements are made in reliance upon the Safe Harbor provisions in Section 27a of the Securities Act of 1933 and Section 21e of the Securities Exchange Act of 1934, which include but are not limited to benefits and performance expected from use of the Company's embedded memory and interface technologies and ICs; expectations concerning the Company's execution and results; expected benefits of the Bandwidth Engine IC; product development and timing of shipments of Bandwidth Engine ICs; [additions] concerning the growth of the Company's business and future market and business prospects, strategies, objectives, expectations or beliefs.

Forward-looking statements made during this call are subject to risks and uncertainties that could cause actual results to differ materially from those projected. Additional information concerning factors that could cause actual results to differ materially from any forward-looking statements made during this call are contained in the Company's most recent annual report on Form 10-K and quarterly report on Form 10-Q filed with the Securities and Exchange Commission, in particular in the section titled risk factors, and in other reports that the Company files from time to time with the Securities and Exchange Commission.

MoSys undertakes no obligation to publicly update any forward-looking statement for any reason except as required by law, even as new information becomes available or other events occur in the future. Thank you for your attention, I will now turn the call over to Len Perham, Chief Executive Officer of MoSys. Go ahead please, Len.

Thank you, Bev. Good morning, everyone. Thank you for joining us today. I'll start the call with an overview of our business accomplishments and then pass the call to Jim for a discussion of our financial results and after that we'll open the call up for a few questions. Following the question-and-answer session I'll conclude the call with a few summary remarks.

Let me begin by saying that I'm pleased with the significant progress that MoSys has made in growing our IT business and very gratified at the significant progress we've made toward becoming a fabless semiconductor integrated circuit company again.

Our Bandwidth Engine family of products was announced in February of this year and early this morning we announced the tape-out of our first Bandwidth Engine product. This is a key milestone in the development of MoSys' innovative new systems oriented integrated circuits and reflects a concerted effort on the part of our talented engineering team with tremendous support and encouragement from everyone at the Company.

I would like to thank all those involved who worked so many nights and weekends and made personal sacrifices in order to achieve this significant milestone. I would also like to acknowledge my Vice President of Engineering, Sundari Mitra's leadership in achieving this significant goal without impacting our many IP programs and customer commitments.

With the tape-out behind us we remain on schedule to deliver samples of the new Bandwidth Engine solution by year-end and we anticipate being production ready in the second half of 2011. I should stop a moment and say this product demanded the creation of a new interface, it uses a new instruction set, we acquired Prism in June of 2009. We defined the product, built the team and developed the product and output to tape in just over a year. That's a very significant accomplishment. Incredible.

Bringing our Bandwidth Engine solution to market is not only integral to our long-term growth plan but critical to our leading edge customers who are trying to get next-generation, more advanced networking systems into the market as we speak.

Not a day goes by that we don't see or hear about new add devices and applications that are increasing the amount of data that must flow through the network. As the data generated from those devices and applications grows exponentially today's networks will be increasingly challenged by bandwidth and performance limitations at the system level.

To ensure the secure and reliable transport required in today's networking systems the analysis of each packet may require 12 to 14 memory accesses by the packet processor. Depending on the application there's a certain quality of service level that is required as well. All of this data analysis represent a huge increase in the bandwidth and computations needed over past systems -- past architectures.

Currently available conventional memory architecture is not an efficient or practical long-term solution to these limitations as they require significant real estate on a network board and consume large amounts of power. These problems will be compounded many times over as current systems expand in an effort to keep up with the increasing demand.

Our systems level approach to solving these bandwidth and performance challenges with our Bandwidth Engine products is resonating well with networking and computing designers to the attributes of this new system oriented solution.

Built from a combination of our patented 1T-SRAM high-density embedded memory and our ultra high speed 10 gig per second SerDes interface IP with an onboard arithmetic logic unit, the Bandwidth Engine will, one, improve performance by reducing latency that takes place at every junction that a packet must travel through.

Two, enable high speed processing by supporting up to 2 billion accesses per second into the associative memory subsystem, and it will be more than four times faster than present-day conventional memory architecture.

Three, deliver four times the throughput of existing devices with up to 40% lower power and enable cost savings of up to 50%, not very evolutionary, in fact, quite revolutionary.

Furthermore, the Bandwidth Engine ICs will also feature our GigaChip interface protocol, an open CEI-11 compatible chip-to-chip interconnect that enables highly efficient serial chip-to-chip communications in next-generation high-speed networking systems. MoSys is in fact in the business of enabling serial chip-to-chip communications on the board level. That is our thrust.

We believe the GigaChip interface represents the next breakthrough in chip-to-chip communications through the use of differential SerDes technology. We are currently building an ecosystem of partner companies who will support the GigaChip interface as part of the overall solutions to these bandwidth constraints. The GigaChip alliance provides participating companies with access to the GigaChip interface and will facilitate collaboration on applications of a high-speed serial chip-to-chip communication.

Earlier this week we announced the launch of the GigaChip Alliance including the early adopters who are joining our efforts to drive an industry adoption of this new state-of-the-art GigaChip interface protocol. These companies, leaders in their respective markets, are well-positioned to accelerate its adoption. We look forward to having other partners join this alliance in the immediate near future.

The next point I would like to touch on is our foundry and customer partner relationships. Late May I spent two weeks in Asia visiting prospective customers and partners all of whom were eager for a status update on this new Bandwidth Engine. In many cases the advanced networking customers required follow-on meetings, including other component suppliers to their next-generation system.

I also visited our close foundry partner with whom we are developing the Bandwidth Engine collect family and technology. As I've stated on this call many times before, a strong foundry relationship is critical to ensuring the reliability and quality of our parts and in the achievement of a low-cost high-performance solution for our systems customers.

In addition, we'll look to our foundry partner to support us in achieving our long-term product roadmap; bandwidth isn't one product, it's a family of products. It's a family of products that will be designed to meet the requirements of countless customer applications. MoSys' underlying core technology is process centric and requires close collaboration with our foundry partner to achieve the highest performance, the highest yield and the lowest cost.

We have an excellent relationship with our foundry partner working on this Bandwidth Engine program, it's the best foundry relationship we have by a far bit.

Now let me turn to updates on our IP business which remains a core part of our overall growth strategy. During the second quarter we continued to demonstrate additional progress in our IP business as reflected by sequential and year-over-year double-digit increases in licensing and royalty revenue.

This growth in license revenue was driven by both our 1T-SRAM and our high-speed I/O IP licenses and royalties from licensees in the gaming and network markets and represents the third consecutive quarter of increases in total revenue. These results reflect our ongoing commitment to aggressively leverage our core engineering capabilities, high-speed high-density embedded 1T-SRAM memory and differentiated low-power SerDes interface IP for both short and long-term financial growth.

We continue to work closely with our foundries and existing customers for follow-on business and to drive early -- and to drive additional adoption of our 1T-SRAM memory and our high-performance interface IP solution. In an effort to further leverage and monetize our interface I/O IP during the quarter we began working with several new partners to develop integrated PHY and controller solutions. These solutions will integrate each partner's specific expertise with our silicon proven PHYs.

Specifically we are partnering with CEVA to deliver a solution for serial ATA generation 3.0 for both host and device side applications. Northwest Logic to deliver complete fully integrated PCI Express 2.0 and DDR3 solutions that combine our PCI Express 2.0 and DDR3 PHYs with Northwest's high performance easy to use IP cores. With PLDA to deliver complete PCI Express 2.0 and 3.0 PHY and controller IP solutions that will enable SoC designers to speed time to market and reduce risks when integrating PCI Express IP.

And finally, Sarance to deliver complete PHY solutions that combine our 10 gigabit SerDes and their 40 and 100 gigabit Ethernet media access controller and Interlaken solutions for next-generation networks, data centers and computer farms. These and future developmental partnerships will increase our competitive position by expanding customer and market opportunities as we co-market and demonstrate the fully integrated PHY plus controller solutions to existing and newly targeted customers.

By partnering with best in class IP providers we expect the resulting technological collaboration to result in leading edge product offerings for our customer base.

Now turning to an update on 1T-Flash. As mentioned on our last call, during the second quarter we were evaluating the latest material on our embedded nonvolatile memory 1T-Flash technology. Overall we remain pleased with the results and are cautiously optimistic about the future viability of this technology.

In June we ordered some additional material, split lots in order to perform further specific lifecycle and endurance testing. The acceptable quality standards for a premium flash product are very exacting and time intensive and we are not going to shortcut this process. We anticipate receiving this additional material back from the foundry this quarter and expect to complete its characterization in the fourth quarter.

To date the products tested has successfully passed the ongoing stringent reliability testing that we put them through and we continue to be committed to developing the highest quality embedded nonvolatile memory solution that will be offered to the market. Demand for an embedded flash solution remain strong, especially for a logic process compatible solution such as MoSys' 1T-Flash technology. If this progress continues we would anticipate bringing our flesh technology back to the market in early 2011.

As we speak, and once these guys get out of bed, the flash organization is working to put together a commercial business plan now to take our 1T-Flash technology back to the market, we need to see these final reliability indicators, but we're sealing off (inaudible) to start work on a go-to-market strategy.

In summary, I am pleased with our continued efforts to expand our revenue opportunities by further monetizing our IP portfolio. The tape-out of our first chip in the Bandwidth Engine family marks a significant milestone for the Company as we drive to bring this very advanced next-generation system-level solution to the market.

We remain vigilant in managing our cash and our expenses during this intensive developmental period and continue to maximize the growth opportunities for our IP business. At this point I'm going to pass the call to Jim for a detailed discussion of the financials and then after the question and answer session I'll have a few closing remarks.

Thanks very much for your attention and thanks for sticking with the Company. We're in the business of trying to drive some value back to you guys. Jim?

Thank you, Len, and good morning, everyone. During the course of my comments I'll make several references to non-GAAP numbers. Unless otherwise indicated each reference will be to an amount that excludes stock-based commendation expands, intangible asset amortization and restructuring and acquisition-related charges.

These non-GAAP financial measures and the reconciliation of the differences between them and comparable GAAP measures are presented in our press release and related current report on Form 8-K which was filed with the Securities and Exchange Commission today and can be found at the investor relations section of our website.

With regard to the results for the second quarter of 2010, total revenue was $4.3 million compared with $3.6 million for the first quarter of 2010 and $2 million for the second quarter of 2009. License revenue for the second-quarter was $2 million, a 33% increase from the $1.5 million recognized in the first quarter of 2010 and a greater than 500% increase from the $300,000 recognized in the second quarter of 2009.

License revenue in the second quarter was primarily derived from ongoing 1T-SRAM and serial interface IP projects including additional revenue from follow-on business with existing licensees. License revenue for the second quarter of 2010 includes revenue from 13 licensees consistent with the previous quarter.

Royalty revenue for the second quarter of 2010 was $2.3 million compared with $2 million for the previous quarter and $1.7 million for the second quarter of 2009. The sequential increase in royalty revenue is primarily due to higher royalties associated with a consumer gaming product that contains our 1T-SRAM embedded memory and from a licensee shipping into networking applications. Second-quarter 2010 royalty revenue was recognized from 15 licensees compared with 14 licensees in the previous quarter.

GAAP gross margin for the second quarter of 2010 was 87% compared with 78% in the previous quarter and 86% in the second quarter of 2009. The sequential increase in gross margin was attributable to the recognition of revenue with no associated cost from follow-on license business from a 1T-SRAM customer, combined with higher royalty revenues.

In terms of our operating expenses for the second quarter, research and development expenses were $6.4 million compared with $5.5 million in the first quarter of 2010 and $3.9 million in the year ago quarter.

The sequential increase in research and development expenses was primarily due to additional costs related to the development of the Bandwidth Engine integrated circuit as well as additional personnel costs associated with additional headcount from our acquisition of MagnaLynx late in the first quarter of 2010.

The additional expenses related to Bandwidth Engine were primarily attributable to increased consulting and software costs as the team converged on the tape-out. The tape-out costs will be incurred and paid in the third quarter.

Selling, general and administrative expenses were $2.4 million compared with $2.6 million in the previous quarter and $2.1 million in the year ago quarter. The sequential decrease in selling, general and administrative expense was primarily due to lower audit and tax expenses related to year-end compliance activities.

Total GAAP operating expenses for the second quarter were $9.2 million compared with $8.6 million from the first quarter of 2010 and $6.9 million from the second quarter of 2009. Total operating expenses in the second quarter included $1.4 million of acquisition-related costs comprised of $800,000 for amortization of intangible assets and $500,000 related to the retention component of earnouts and other requirements from our acquisition of Prism Circuits and MagnaLynx.

Total operating expenses also included $800,000 in stock-based compensation expense. On a non-GAAP basis total operating expenses for the second quarter of 2010 were $7.2 million compared to $6.6 million for the first quarter of 2010 and $5.2 million for the second quarter of 2009. We continue to manage operating costs closely against our planned investments for Bandwidth Engine developments and our 1T-Flash technology.

Non-operating income was substantially comprised of interest income, the sequential and year-over-year declines were primarily due to lower interest income on lower cash balances and lower interest rates earned.

On a GAAP basis the net loss for the second quarter was $5.4 million or $0.17 per share compared with a net loss of $5.7 or $0.18 per share in the prior quarter. This compares with a net loss of $5 million or $0.16 per share for the second quarter of 2009.

On a non-GAAP basis the net loss for the second of 2010 was $3.4 million or $0.11 per share which excluded acquisition-related and stock-based compensation expenses totaling $2.1 million. This compares with a non-GAAP net loss of $3.7 million or $0.12 per share in the previous quarter and a loss of $3.3 million or $0.11 per share in the year ago period. Net loss per share on both a GAAP and non-GAAP basis for the second quarter was computed using approximately 31.6 million weighted average shares outstanding.

Now turning to the balance sheet, as of June 30, 2010 our cash and investments balance was $31.2 million compared with $33.9 million at March 31, 2010. Cash expenditures in the quarter included $3.1 million of cash used in operations and $1.2 million in cash payments related to the acquisition of MagnaLynx. These expenditures were partially offset by $1.4 million in net proceeds from option exercises including $1.1 million from exercises by our CEO.

On July 1 the Company redeemed at par the remaining 3.4 million of auction rate securities still in the portfolio. Accounts receivable at the end of the second quarter totaled $2 million compared with $1.6 million as of March 31, 2010. The increase in accounts receivable was probably due to the timing of invoicing for follow-on business received during the second quarter.

Unbilled contract receivables at June 30 were approximately $127,000 and continue to decline as the Company completes billings under customer contracts assumed upon the 2009 acquisition of Prism Circuits.

At June 30, 2010 liabilities totaled $12.9 million and had increased $2.1 million from year end. The increase in total liabilities was primarily due to a $2.3 million increase in acquisition-related liabilities related to the Prism acquisition earnout and the acquisition of MagnaLynx in the first quarter.

In July 2010 the Company paid the full $6.5 million earnout amount owed to Prism Circuits as the earnout requirements had been achieved. As of June 30, 2010 our total headcount was 166 employees which compared with 164 employees as of March 31, 2010. As of June 30, 2010 approximately 80% of our employees were in engineering and research and development and we had 53 employees in India.

This concludes my prepared remarks. At this time we would like to open the call for a question-and-answer session. Please clearly state your name and company affiliation prior to asking your question. Thank you. Operator?

(Operator Instructions). Gary Mobley, The Benchmark Company.

Hi, guys. I wanted to start off with a couple questions regarding Bandwidth Engine. Just curious, how much larger does this GigaChip alliance have to grow in order for the Bandwidth Engine ecosystem to be fully seeded?

I think the key expression there that you used was fully seeded. I think we're at the advent of a strong movement to serial chip-to-chip communications at the board level. If we think of the big players on that board, now that would mean that my opinion is that we have the opportunity to rethink now -- and I say this a different way.

If we can imagine in our minds a bunch of signals encroach on a one foot square board and the signals are coming in at the left and going out at the right, and in order to get the signals in at the left through the input and out at the right through the output inside of the board, there's maybe 50 transmissions and 50 receptions of information just moving around inside of the card in order to help that information flow in and out.

When you go to serial you get to rethink what every single chip on that card should be doing. And if you're really a leader in serial, which we are, you're probably going to have better visibility than most at understanding that maybe certain things that used to be done in one function should be done in another because you'd like to have the information go into the card and come out but reduce intracard communication from 50 transmissions to maybe five.

So the answer to your question, Gary, is I see the complete conversion to serial as -- serial cards maybe over the next probably five to 10 years. Low-end systems won't have to make that journey, there will probably be cost reasons to stick with the old way.

Now coming back to kind of the other question, the FPGA is used extensively on these cards and it can be used as a stand-alone programmable device or it can be used as a competitive solution against ASICs or even other more conventional SoCs. Once one of the or both of or all of the programmable device guys put our interface on their chip, everywhere they're used we're a candidate to be used.

So for us I would say that based on the level of interest in adopting the GigaChip interface or joining the GigaChip interface Alliance, I would think by the end of this year that we should see people sign up to become members of the GigaChip Alliance and to include the GigaChip interface on their chip that should allow us access to a market that could enable us to maybe drive revenue by some kind of a factor between 20 and 50 times over the next three to five, six years.

Now why would I say something crazy like that? We're going to have a head start in this market; we're a unique solution bringing a new solution to the market. That coupled with our very strong IP content in this solution, and coupled with our very close relationship with our foundry, should enable us to really take a leadership position here.

So, we're going to be having all kinds of opportunities to grow and we're going to be also able to see new chips that we've not yet discussed with our shareholders but certainly discuss with our customers whole new chips, different in some cases in the Bandwidth Engine, but now applicable to the New World of serial communications on the board. That's a long-winded answer, but I hope it gave you what you wanted.

Okay, well, it certainly parlays me to my next question. You mentioned that you expect to have samples by the end of the year. Would you expect to generate revenue from these sample quantities?

When I talk about samples in the fourth quarter, what we have now is we're at the mask shop this morning, we'll get the mask made in the next couple of weeks, we'll start silicon; it's going to take eight, 10 weeks of the silicon.

Sometime around October 1 we're going to have some silicon in our hand, we'll do a blind build of the silicon so that we can have some stuff in packages. And we already have what I'll call season gates or reference boards where we have one FPGA talking to another FPGA and it's performing like a mini Bandwidth Engine and it's sending information back and forth and verifying all the functions are good.

We will move from that sometime in late November into December to dropping the part into a reference board where it's supported maybe with all Altera gates or maybe a card with all Xilinx gates. And now that card is a true reference card. I believe we'll sell a few of those for money and we may end up -- who knows, we may end up selling a few and even giving away a few.

I would think we would generate a little bit of money before the end of the year, but it wouldn't be meaningful. The real -- the only message it would be delivering is that we're on schedule to be ready to ramp it in the second half of 2011.

Okay. I just wanted some clarification as well as far as what you said in the press release -- you expect your IP business to grow in the second half, or that's your contention. Now, is that because the first quarter is such an easy comparison or do you expect the third quarter and fourth quarter to build on the momentum generated in the second quarter?

Actually we came out of 2009 with pretty huge momentum. We had a great fourth quarter last year and we've been fighting inside the Company to keep that side -- that kind of a pace up because that was such a gratifying quarter.

As we go into the second half of the year the level of activity in front of us is very, very high; the number of deals that we're negotiating is very, very large. The need for high-speed I/O and the need for embedded memory has not abated at all. I don't watch the market as close as I should these days, but it looks to me like -- that there's a real need to get some advanced systems to the market in many different areas and I don't see that going away unless the macroeconomic situation really tanks.

So the answer would be that we just are looking into the end of this quarter and into the third quarter, then into the fourth quarter with a lot of stuff on the plate in negotiation and some deals moved out. So we're optimistic that some of that's going to come to pass. And hopefully we'll see very strong third and fourth quarter results, Gary.

Okay. And one question for Jim. You mentioned that the tape-out costs are going to be recognized in the third quarter. I was hoping that you can quantify that and then as well what the R&D expenses might look like beyond the recognition of those tape-out expenses.

Yes, the tape-out will run kind of in the $1.25 million range with some other costs around that, so call it around $1.2 million that we'll incur in the third quarter. We will see on top of that some increases in R&D costs in the third quarter. In connection with the Bandwidth Engine we have had to go out and purchase some additional tools which will drive expenses a bit higher in the third quarter.

In addition, we've had to -- we blew through our estimates as far as what we through we'd need in the way of compute power just with what was required with the chip. So we had to go out and make some additional CapEx in the first half of the year that hadn't been expected and the related costs associated with that. So we'll see it tick up in the third quarter in connection with the tape-out and ongoing costs related to the tools and compute, etc.

Okay, all right. I'll hop back in the queue. Thanks, guys.

Thank you, Gary.

Sandy Harrison, Signal Hill.

Thanks, good morning, Len and Jim. As I listened to your presentation and look at the results and go through the technicals of some of those parts, and Len, your prior comments about moving to more of a deterministic architecture and things like that.

But realistically what we're kind of looking at here is almost a revolutionary architecture versus sort of an evolutionary architecture. And if you look at the communications industry, they tend to not like revolutionary things, they like more evolutionary things.

So, the two questions kind of that are a little broader I think is -- one, what is the catalyst here that get these guys into a revolutionary mode versus evolutionary mode? And with that said, is there some other technology out there potentially that would be I guess how do you say good enough or evolutionary enough that they wouldn't need this? And is that something you're also looking at as sort of an interim as you guys go forward with your new products?

I would have to say that the catalyst to allowing or enabling serial chip-to-chip communications at the board is the development of this gigabit -- GigaChip interface protocol. Up until now the interfaces between the chips on the board or -- and remember, I hadn't said this morning, but people have been moving information across the backplane serially for a long time now.

And they move through interfaces such as Interlaken and GRIO and SRIO. And these interfaces were all created to manage very, very large packet sizes and enormous amounts of information and they handle it very well, very high-speed and very efficiently.

Now when you come down onto the board you might want to only move a couple of bites around and these interfaces become very, very inefficient. So the problem that people have had in moving toward serial chip-to-chip communications at the board level was the absence of a very efficient interface.

So now we find that we have two kinds of people looking at this interface, one are the people that want it in their systems, and that would be anywhere from the (inaudible) might look at to buy this stuff would be Sysco, Juniper, Huawei, Alcatel, ZTE, Broadcom -- I'm sorry, Brocade, somebody like that, Fujitsu, Hitachi.

Anyway, they're looking at this interface with great interest. And the reason they like is a one of the things driving this it's very, very difficult now to get to the next generation of switching router. A number of companies have told me it's not possible to use old or what I'm going to call conventional architecture, especially conventional memory architecture and do their next-generation system.

They can't get to the power budget, they don't have enough pins on the card to it because parallel requires huge numbers of pins. So, one, the catalyst is this interface; and two, a lot of guys just can't see how to make the next-generation system.

So now the third point would be in order to adopt the GigaChip interface it's a very lightweight interface, today Interlaken Look-Aside, which is a backplane interface, would take 150,000 gates of an FPGA to interface between the FPGA and say a NetLogic KBP or somebody's RLDRAM or something like that.

If you were to adopt the GCI interface you would only use maybe 15,000 gates, it's trivial. So now what would that mean? Well, that would mean that one thing the guy could consider doing is putting an Interlaken I/O on there and putting ours on there as well. And then he can just decide what he wants to do, how hard he has to push for performance in his next-generation system.

So, now, that would kind of lead me into other technology. At this point in history there is just a massive built up demand for a really system oriented memory to replace what I'll call conventional memory technology. But the adoption doesn't have to be instantaneously go/no-go. There are a lot of people that would like to still use maybe a whole bunch of DDR3 or DDR2, but looking out the other side they would like to be looking out through some very high-speed serial ports.

So, I think we'll see it's pretty much how do you develop a converter from pounds to kilograms or from metric to conventional. And I think we'll see some of that developed as well. And we've had a lot of pressure from our customers to smooth their transitions by allowing them to move back and forth deftly using both for a little while as well. Perhaps that's your answer.

Got you. Thanks for going into that. And then from a perspective of transitioning from an IP company to one that's developing and introducing chips and so forth, have you had to change your sales and marketing strategy and your team and are they all in place now? And how is it -- are you almost going out in an apostle like form to talk to these companies you mentioned, the Juniper's and Sysco's of the world, or are they coming to you going hey, you guys have got a good idea, how do we execute this thing?

So, there would be two answers. The journey from being an IP company to being an IC company is certainly a hell of a lot easier to say than to actually execute. So when we brought out our Bandwidth Engine or when we saw what we wanted to do and we wanted this super high-speed I/O, an IP company usually develops a micro that sits in the middle of another integrated big system, like an SoC.

So the guy that develops the macro oftentimes doesn't have to -- now the IP guy -- the I/O guy, I'm sorry, does, but the macro memory guy doesn't have to look out and deal with the interface of the SoC to the world around it, i.e. the package. So, we were somewhat light on packaging here, so in our first product we brought in a partner, eSilicon, and eSilicon has worked with us and will work with us.

The agreement between us is Bandwidth Engine one only, we have the opportunity to expand it in may. But for right now they have been our partner in the interface of our high-speed integrated circuit and they actually have developed a reasonably transparent package in terms of electrical impedance. And they'll play a role in setting up our backend flow so that the testing comes in and we're just in time delivery and behave in the mature fashion that we need to in order to supply the Fortune 50 companies.

We have a lot of talent around here that I've brought in that has done all this before. But our ramp could be such that we need to have more credibility in the beginning. And so, we've looked outside to get some of that, Sandy.

Okay, great. Appreciate you addressing those questions, Len.

Thank you.

(Operator Instructions). Jeff Schreiner, Capstone Capital.

Hey, Jeff, are you there?

Can you hear me?

I can hear you now.

All right. Well, I want to just talk, Len, it seems like you had mentioned just earlier in an answer to another question that you feel like things are really on track here for the Bandwidth Engine. And I'm trying to get a better gauge that as you begin sampling here near the end of this year and into early next year.

Does [on time] then still expect some type of field trial, qualification trials in customer products maybe by the end of 2012 which would lead to probably meaningful revenues nine to 12 months later? Any help you can give us there kind of on the timeline as we move from sampling and beyond to meaningful revenues.

Actually -- that's a good question, Jeff. So as you look at the board and where you want to enable serial chip-to-chip communication, if you're going to go into an FPGA, then if the customer has decided that he's going to use an FPGA as his SoC, then that means he's going to get to the market sooner. And we have a huge amount of emphasis from nearly all of the providers of programmable solutions that can go after SoC business.

So, in the case of the systems companies that are going to market with FPGA-based systems, they're all over us already for the mini Bandwidth Engine where we have one FPGA talking to another, one for system and one behaving like a Bandwidth Engine and they're swapping information back and forth. Then they're all over us for reference boards. A number of the big systems houses have moved past discussions on the GCI interface; they want the RTL so they can put it into there ASICs right now.

I would believe that assuming the normal amount of lateness, meaning that everybody is always struggling to be on time, that the guys that are putting together the designs for the next-generation systems with the FPGAs. We should expect to see some of those guys starting to buy small quantities in the middle two quarters of 2011 and I would expect that some of them are going to start wanting to start putting maybe a reasonable amount of stuff into their channel in the last four months of the year.

And I strongly believe that if we're hitting on all eight cylinders we should see IC revenue be more than 50% of our revenue in 2012. So -- and we have a really strong push on from several of the top six or eight players in the systems end of the business right now all talking about middle 2011 and on out. And I had -- did not mention today but the sales force in the Company is under a strong charter to have three to five real customers in place by the end of this calendar year.

And I think we probably have a couple of them totally committed in every way except not totally formally yet. But I would think that's coming together really well as well. And it was mentioned and let me just, Jeff, go beyond your question a bit. I think it was Sandy that asked about the sales force.

We are in fact heavily oriented to selling IP around here and of course my entire experience is selling IC. So over the years I happened to mentor and help develop guys that have gone on to significant positions in the IC world selling products for prestigious companies and we may well grab up one of those guys so that we have somebody that can put together a very powerful IC selling program right alongside of our IP selling program. I think I've answered your question, Jeff.

You did, thank you, Len. But maybe to follow up on something Sandy brought up in terms of the revolutionary versus evolutionary. You've gotten some people in, some of the FPGA guys, NetLogic, obviously there are ties there in terms of working with you on the Bandwidth Engine. But what does it take to -- and I know you say demand is strong, but I get what does it take to get such a change in the industry in your experience, Len, to move to make that leap?

They may not like to do it, but sometimes they probably have in the past. And in your broad experience what's been the real trigger? Is it maybe a big adopter in terms of one of the big equipment guys or pushing it down or any help you can give us there would be very beneficial.

I think if you go and take a look at -- if you are able to visit with a few of the top seven guys, which I would again say were maybe Sysco, Juniper, Huawei, Alcatel, Fujitsu Networking, NEC Networking, ZTE. I think you will find that more than half of them will tell you that they cannot, when using conventional available integrated circuits that they can design into their next-generation systems they cannot make the speed, they cannot supply enough pins on the line card and they cannot stand the power it's going to take to make the next-generation system.

So consequently way back in February this year after we made our announcement, even I'll say for the four months prior to that, we had discussions with a few of the top five guys and in that case we really targeted the United States because that's where we live. And the level of enthusiasm for the interface was just dramatic. And the freedom it brought to them to really build significant performance upgrades into the next generation systems is really driving them to jump into this.

And the one problem they couldn't have lived with would have been a loss of bandwidth efficiency and interface solved that problem and it's not expensive and it's not real estate intensive to have it there. So I think what's pushing it is that you couldn't get there from here with the next-generation systems, it was just over with conventional -- the conventional approach.

Okay. And coming back to the 1T-SRAM kind of similar to a Phoenix, it burns and rises again from time to time. Wondering -- it sounds like things are going well, but we've heard that in the past with a company on this product. Are we at our last step here with the 1T-SRAM? If it fails is it kind of shelved or do you think you've now made enough progress where you're at the point where you kind of just need to keep putting money in right now?

I think that the -- we need to work with our foundries to get the development of the embedded memory cell, the building block, available at a given technology sooner. And let me say what that means. What that means is right now the world's best foundries are finishing up defining their 40 nanometers and driving very hard at 28 nanometers.

And that means that they're probably driving two technologies, they may be driving an L power technology, low power for consumer, and they're driving a G technology and the G technology is the preferred technology for anybody that wants to run super high speed on his I/O.

So now those technologies are available. And there's no question that people doing SoCs desperately want to put large memory macros into their SoCs. But these foundries are just now turning their attention to 40 nanometer and 28 nanometer embedded memory cores and cells, if you will. So, that trailing edge makes it hard for the memory to get into some applications.

So that said, the development by most of us of a line of what I'm going to call standard products, standard powerful system solutions that we will no doubt work with some parties to provide second sources so that the customer can see multiple sources, that will demand a steady supply of wafer starts in our foundries. And that will allow the foundry to see it's really worth their while to really polish this embedded memory technology and capability.

So I think we're going to see a lot more attention paid to it because the real key here is the bandwidth engine is taking -- it's sort of replacing conventional memory and it's going to uncover a huge opportunity and it's going to get used in not just networking, it's going to get used in storage, it's going to find its way into applications in graphics and the foundries are going to jump on this. I think we'll see people polishing that apple so that they can have the capability earlier and more efficiently and effectively.

Okay. final question from me. Jim, just to kind of keep you involved, buddy.

Appreciate it.

You might have said something, maybe it's a little too early and my ears weren't working yet. But can you give us any direction on maybe where you think cash burn is now since you're about halfway through the year and maybe what you think it's going to be for the next two quarters and maybe end up for the full year, do you have any idea or any forward help you can give us there?

I certainly have an idea and you certainly you know it's not our practice to give forward-looking guidance. But I think I can certainly provide some color. As you probably recall on the Q1 call we had back in April Len had talked about targeting kind of cash being in the $20 million range at the end of the year.

When I look at where we're at, we finished the quarter with about $31.2 million. The change in investments during the quarter was about $2.7 million, but I had about $400,000 move out of a receivable related to this UBS thing and to investments, so really the burn was about $3 million. Obviously we've got a heavy quarter ahead of us with the tape-out.

As I mentioned, we paid the Prism earnout which was $6.5 million; taking that off the $31.2 million, I'm at $24.7 million. So we're obviously going to struggle to make the $20 million at the end of the year. We're probably looking more at the high teens. Based on the current run of the business with license and royalties, frankly, on some of the deals we had a good follow-on deal during the quarter and particularly it related to -- I don't want to say the customer's name, but it related to one of the large 1T-SRAM deals that we booked back in the fourth quarter.

And we're looking at prepaid royalty and royalty buyout options to bring in additional cash. Historically, in the IP business you generally avoid those like the plague, you want that future revenue stream from the royalties. But given the position of the Company right now and our view to the future as being a fabless company, we're certainly looking at those. But I see at the end of the year we're going to struggle to hit that $20 million number and probably be more at the high teens.

All right, thank you very much for your time.

Thank you, Jeff. Appreciate the questions.

At this moment, there are no further questions in the queue.

Okay. Then if there are no further questions, then maybe I will just make a couple of summary comments. First, I'll trail in behind Jim on our balance sheet and cash on hand to make this journey. We are aware that we need to pay attention to cash. I think I closed out my previous remarks saying we are very vigilant and watchful of our cash position.

You know, we need to have second sources around here. I can't tell if it cost $50 million or $80 million to develop this product. And when we bring up a second source, we are the guys that sort of -- the chalice that has all of the various pieces of IP in it. We are looking at various ways that we might create second sources for our customers, and I believe that we will find a deal that we may find our way to bring a little cash into the Company.

I've told a number of shareholders in past conversations that it's my intention to make this journey, and worked very, very hard to arrive with the cash we need and keep the balance sheet strong in a non-diluted fashion. And I continue to work on that with Jim on a daily basis.

That said, you know in closing we've accomplished a great deal to date in 2010. We've achieved key milestones in the development of our revolutionary Bandwidth Engine family of ICs, including the successful tape-out of the first Bandwidth Engine family product. More to come.

This is a key step in moving MoSys toward becoming a fabless IC company. Nobody asked this morning, but from my point of view as an IC guy, we taped out. So by definition, that means we are at the beginning. We will get our silicon back in beginning of October to mid October. We will have to spend a month or so determining complete functionality, make sure that timing and speed is all where it ought to be, power is where we want it to be.

And then as we grow comfortable in our design or we have a bug sheet, we will start to getting stuff into our reference boards. But we really are just at the beginning of an exciting and credible journey.

We launched the GigaChip alliance and I talked about it a fair bit this morning. It enables a major step forward or it solves a major problem associated with serial chip-to-chip communications at the board level. Having Altera and NetLogic Microsystems sign up as early partners is a major thing. And I didn't go into all the details, but the Bandwidth Engine enables an enormous increase in the power efficiency and effectiveness of their solutions on the board, not competitively but cooperatively, in terms of the solutions they provide.

We look forward to announcing additional members of the Alliance journey in the immediate near future, and expanding the reach and the relevance of this interface over the months until year-end and into next year. It is going to be -- there will be a number of adopters, you can be sure of that.

Market demand remains strong for our Bandwidth Engine and we're focused on working with lead customers to get the Bandwidth Engine designed into their product roadmaps. We have a lot of pressure on us to give out what I call our mini Bandwidth Engine solution, a couple of FPGAs talking together, one being the system, one being the bandwidth engine.

We have a lot of pressure on us for our reference boards. I can tell you that if we had them available right now, there is a 100% probability that we would be shipping some as soon as we could get them into boxes.

Turning to our IP business, we continue to make good progress, including topline growth with increased revenue from our core memory and our I/O technologies. And we continue to expand future IP business opportunities via partnerships in collaboration, and we will do that on into the near future here.

We are excited about our long-term growth opportunities. The Bandwidth Engine family is -- it's an advance solution for a market that is currently served with nearly $1 billion a year of integrated circuits that don't provide the performance, the cost or the power of our solution.

Our initial target for the Bandwidth Engine ICs is a large and growing next-generation networking systems market, with additional opportunities obvious to us in the storage and in the server area. Combined with our solid IP business, we are most definitely positioned for future growth. Execution is key. We've been good at it so far and I don't see us falling off that curve too much.

And I'm excited to see what we have achieved in these past few months. I'm extremely gratified at my investors' patience, and I just want to leave this call telling you we don't lose sight ever in our goal to drive some increasing shareholder value back to you.

We look forward to talking to you in the next quarter. Thank you very much for the time this morning. I hope you all have a great afternoon. Bye now.

Thank you for your participation in today's conference. This concludes your presentation and you may now disconnect. Have a great day.