Peraso Inc (PRSO) 2010 Q1 法說會逐字稿

Good afternoon and welcome to the MoSys first quarter financial results conference call. At this time, all participants are in a listen-only mode. At the conclusion of today's conference call, instructions will be given for the question-and-answer session. (Operator Instructions). As a reminder, this conference call is being recorded today, Wednesday, April 28, 2010.

I would now like to turn the call over to Beverly Twing of Shelton Group, the investor relations agency for MoSys. Beverly, please go ahead.

Thank you. Joining me today on today's call are Len Perham, MoSys' President and Chief Executive Officer, and Jim Sullivan, Chief Financial Officer. The first quarter 2010 financial results press release was distributed at the close of market today and is available on the MoSys website at www.mosys.com.

Before we begin today's discussion, I would like to remind everyone that this conference call will contain forward-looking statements based on certain assumptions and expectations of future events that are subject to risks and uncertainties. Such statements are made in reliance upon the Safe Harbor provisions of Section 27A of the Securities Act of 1933 and Section 21E of the Securities Exchange Act of 1934, which include, but are not limited to, benefits and performance expected from use of the Company's embedded memory and interface technologies and ICs, expectations concerning the Company's execution and results, projected improvement of operational efficiencies, expected benefits of the bandwidth engine IC, product development, and timing of shipments of bandwidth engine IC, predictions concerning the growth of our business and our future markets and business prospects, strategies, objectives, expectations or benefits.

Forward-looking statements made during this call are subject to risks and uncertainties that could cause actual results to differ materially from those projected. Additional information concerning factors that could cause actual results to differ materially from any forward-looking statements made during this call are contained in the Company's most recent report on form 10-K filed with the Securities and Exchange Commission, in particular in the section titled Risk Factors, and in other reports that the Company files from time to time with the Securities and Exchange Commission.

MoSys undertakes no obligation to publicly update any forward-looking statements for any reason except as required by law, even if new information becomes available or other events occur in the future.

Thank you for your attention. I will now turn the call over to Len Perham, Chief Executive Officer of MoSys. Go ahead please, Len.

Thank you, Bev. Good afternoon, everyone. Thank you for joining us today. I'll start the call with a few short remarks and then pass the call to Jim for a discussion of our financials, and after that, we'll open the call up for a few questions. Following the question and answer session, I've got a few remarks to conclude with and the first quarter of 2010 was a very exciting and busy time for the Company. We made several significant announcements, held a press conference at Santa Clara Design Show announcing our bandwidth engine family of ICs, closed our acquisition of MagnaLynx, saw a substantial increase in our license revenue.

So let's take a deeper look at some of these things. On our last call, I started that we intended to aggressively prosecute our IP business in both the short and long-term, while also becoming a fabless semiconductor Company. I believe this combined business model will allow MoSys to optimally exploit our substantial base of IP, and over time, drive toward much greater shareholder value while simultaneously positioning the Company for significant long-term growth.

During the first quarter, we made substantial progress toward these goals. Most notably, we announced our plans for the bandwidth engine family of products with initial units forecasted to be available for sampling late fourth quarter this year. We launched the GigaChip Interface and open interface protocol supported in the bandwidth engine and aimed at enabling efficient, high-speed, serial chip-to-chip communication. And we acquired MagnaLynx to further expand our low power SerDes technology and engineering capabilities benefiting both the bandwidth engine and our SerDes IP business as we go down the road.

In February, we announced a new strategic vision for MoSys, a significantly modified business model and a product roadmap for our bandwidth engine IC family, which combines our 1T-SRAM embedded memory intellectual property and our high-speed serial I/O design expertise. I believe this move toward a fabless IC sales and the development of the bandwidth engine family is a natural progression for the Company and positions us to serve larger market segments and drive much greater shareholder value.

In 2009, we closely evaluated multiple opportunities to exploit our memory and interface IP and design expertise in order to bring added value to the customers in broader markets. We saw a significant opportunity in networking applications, a product -- a market where we've had modest success to date selling just our IP products. Data and video traffic across the networks continues to increase exponentially and the requirements for higher transmission speeds, greater reliability, and increasing bandwidth will continue to expand into the foreseeable future.

In evaluating the challenges facing next generation networks, it became evident to us that designers are severely challenged by bandwidth and performance limitations at the system level. Most importantly, we noted that traditional memory solutions are not an efficient or practical solution to these limitations. They require significant board real estate and they consume large amounts of power. Our proven expertise of high density, high-speed, 1T-SRAM memory, and high-speed SerDes technology along with our deep system application knowledge has enabled us to launch a development effort for the bandwidth engine family of ICs targeted to address the performance issues plaguing network designers as they work to architect next generation systems.

The bandwidth engine is a carefully thought out solution aimed slowly at solving a system level design and architectural problem. For those of you not yet familiar with our bandwidth engine technology, let me give you a quick overview. It is based on our 1T-SRAM, a fast random access and very low latency memory core that, combined with our ultra high-speed gigabit per second SerDes, integrated together with a high-speed computational capability and a very advanced programmable, built-in self-test engine. The bandwidth engine will provide a system level solution that can significantly improve overall performance while enabling up to 2 billion accesses per second, approximately four times the performance of designs utilizing currently available technology.

Additionally, the bandwidth engine is expected to provide up to four times the throughput, two to four times the density of today's SRAM based systems, 40% lower power, and cost savings of up to 50% for next generation networking systems. This is not evolutionary. This is revolutionary. Since we announced the bandwidth engine product line in February, I'm pleased to report that we're making good progress towards a scheduled tape-out in the early summer. We remain on track to meet our plans to have customers sampling first product by the end of this year.

Additionally, we are seeing an incredibly positive response from both potential customers and partners. Along with the bandwidth engine, we announced our GigaChip interface, an open interface protocol built from serial technology and compatible with current industry standards. The GigaChip interface will be supported in our bandwidth engine ICs and is designed to enable efficient, high-speed, serial chip-to-chip communications in networking and in other systems as well. We are moving forward with the intent to create an ecosystem of networking companies, including FPGA, ASIC, KBT, or other chip suppliers to support this interface protocol and enable their chips to communicate with the bandwidth engine. In short, to enable serial chip-to-chip communications at the board level.

Our goal is to bring a solution to market that is widely available and becomes a standard for chip-to-chip communication serially at the board level. I expect that you'll see us announce a couple of partner adoptions of the GigaChip interface later this quarter or early in the next and then ongoing through the balance of the year and perhaps into next year.

Let me talk about MagnaLynx for a minute. Late in the first quarter, we announced our acquisition of MagnaLynx to further expand our SerDes technology portfolio and capabilities. This acquisition expands our SerDes engineering team and brings us unique expertise in lower power techniques and applicable to high-speed SerDes. A critical growth strategy at MoSys is to become a leader and prime innovator in high-speed SerDes for board level serial chip-to-chip communications for both our business and our bandwidth engine family of ICs. Having the MagnaLynx team on board puts us in a better position to execute on this strategic plan.

At this point, I'd like to take a moment to formally welcome Scott Irwin, a continuing operations-founder of MagnaLynx and Chairman of MagnaLynx, and the other cofounders and team members to the MoSys family. Welcome aboard, guys. Scott and his team are located in Ames, Iowa and have considerable experience in serial chip-to-chip communication technology. We have already begun to leverage their expertise for our interface IP business and as well for our future bandwidth engine IC product development. I believe the new MoSys Iowa team will make significant contributions to our ongoing R&D efforts and our future product roadmap.

In March, I embarked on a three-week trip to Asia with my first visit to our office in Hyderabad, India where we've assembled a strong, multitalented engineering team that works on both our advanced I/O designs and plays a key role in the development of the bandwidth engine. Current headcount in Hyderabad is 51. Leaving India, I wound to China, Japan, and Taiwan to visit current and potential customers and partners and at each stop we described both our bandwidth engine family of products, as well as our common electrical interface CEI-11 compliant GigaChip interface. Potential customer and partner's response to these advanced technological solutions was extraordinary. It was indeed a very gratifying series of meetings.

Turning to our IP business. During the quarter, we achieved our highest licensing revenue level since the second quarter of 2007 as agreements secured in the second half of last year began to ramp, including our recently announced 1T-SRAM technology agreement and partnership with ROHM. First quarter license revenue also gained contributions from two additional 1T-SRAM development agreements we signed in the fourth quarter of 2009, as well as ongoing serial interface IP projects. We continue to see very, very strong demand for our SerDes IP.

A little bit about the 1T-Flash project. As a quick update on our 1T-Flash non-volatile memory solution, I mentioned last quarter that we needed additional engineering material in order to complete a thorough and complete characterization of our 1T-Flash cell end product. We recently received that silicon back from our foundry partner and are currently completing this characterization. I expect these efforts will take a good part of this quarter to complete.

Results to date look encouraging, very encouraging. We should have a much better understanding of this technology and its range of applications at our analyst call in late July. Various foundry partners continue to express a very strong interest in licensing this 1T-Flash technology for their future -- for the customer's future needs.

Summarizing our first quarter, we made good progress on our new vision and business model while continuing to focus on monetizing our IP portfolio. We have a strong backlog of business to deliver on, which I expect will grow our top line and improve our bottom line in the second half of 2010. Our financial results for this first quarter reflect an increase in product development costs for our bandwidth engine family of ICs and we expect these costs to increase somewhat as we approach our tape-out.

We're keeping a close eye on cash to ensure we have enough on hand to achieve our long-term objectives and to bring the bandwidth engine of ICs into volume production. We are indeed making solid progress in all areas of our business and I look forward to providing additional updates to our shareholders as time progress.

At this point, I'm going to pass the call to Jim Sullivan for some detailed discussion of the financials and then after the question and answer session, I'll have a few closing remarks. Thanks very much. Jim?

Thank you, Len, and thank you everyone for joining us this afternoon. During the course of my comments, I will make several references to non-GAAP numbers. Unless otherwise indicated, each reference will be to an amount that excludes stock-based compensation expense, intangible asset amortization, and restructuring and acquisition related charges. These non-GAAP financial measures and a reconciliation of the differences between them and comparable GAAP measures are presented in our press release and related current report on form 8-K, which was filed with the Securities and Exchange Commission today, and can be found at the Investor Relations section of our website.

With regard to the results for the first quarter of 2010, total revenue for the first quarter of 2010 was $3.6 million, compared with $3.5 million for the fourth quarter of 2009 and $2.6 million for the first quarter of 2009. License revenue for the first quarter of 2010 increased to $1.5 million, compared with $1.3 million in the fourth quarter of 2009. License revenue in the first quarter was primarily derived from ongoing serial interface IP projects, early stage revenue from two new 1T-SRAM license agreements signed in the fourth quarter of 2009, and increased revenue from the 1T-SRAM technology license agreement we entered into with ROHM in 2009, which we announced earlier this quarter, or I'm sorry, in the first quarter of 2010.

On a year-over-year basis, license revenue increased by 195% over the $500,000 recorded in the first quarter of 2009, primarily due to the inclusion of serial interface projects. License revenue for the first quarter of 2010 was recognized from 13 licensees compared with 12 in the previous quarter.

Royalty revenue for the first quarter of 2010 was $2 million compared to $2.2 million for the previous quarter and $2 million for the first quarter of 2009. The sequential decrease in royalty revenue was primarily due to lower royalties associated with a consumer gaming product that contains our 1T-SRAM embedded memory. First quarter 2010 royalty revenue was recognized from 14 licensees compared with 15 licensees in the previous quarter.

GAAP gross margin for the first quarter of 2010 was 78%, compared with 80% in the previous quarter and 87% in the first quarter of 2009. The decline in gross margin was primarily attributable to license revenue being a largely percentage of total revenue, as the license revenues have associated engineering costs. In terms of our operating expenses for the first quarter, research and development expenses were $5.5 million, compared with $5.1 million in the fourth quarter of 2009 and $3.9 million in the year ago quarter.

The sequential increase in R&D expenses was primarily due to additional costs related to the development of the bandwidth engine integrated circuit, as well as our expanded engineering team, which includes the interface team that joined us in the second quarter of 2009 from our acquisition of Prism Circuits. Selling, General, and Administrative expenses were $2.6 million compared with $2.5 million for both the previous quarter and the year ago quarter. The increase in SG&A expense was primarily related to expenses incurred in connection with our acquisition of MagnaLynx.

Total GAAP operating expenses for the first quarter were $8.6 million, compared with $8.1 million in the fourth quarter of 2009 and $6.6 million in the first quarter of 2009. Total GAAP operating expenses in the first quarter included $1.3 million of acquisition-related costs, comprised of $600,000 for amortization of intangible assets, $500,000 related to the retention component of earn-out from the Prism Circuits acquisition, and $200,000 in transaction costs related to MagnaLynx. Total operating expenses also included $600,000 in stock-based compensation expense.

On a non-GAAP basis, total operating expenses for the first quarter of 2010 were $6.6 million, which compared with $6.2 million for the fourth quarter of 2009 and $5.8 million for the first quarter of 2009. Non-operating income totaled $109,000 and was substantially comprised of interest income and compared with $251,000 for the previous quarter, and $203,000 for the first quarter of 2009.

On a GAAP basis, the net loss of the first quarter of 2010 was $5.7 million or $0.18 per share. This compares with a net loss of $4.9 million or $0.16 per share for the fourth quarter of 2009, and a net loss of $4.2 million or $0.13 per share for the year ago quarter. On a non-GAAP basis, the net loss for the first quarter of 2010 was $3.7 million or $0.12 per share, which excludes acquisition-related and stock-based compensation expenses totaling $2 million. This compares to the non-GAAP loss of $2.8 million or $0.09 per share in the previous quarter, and a loss of $3.4 million, or $0.11 per share in the year ago period. Net loss per share on both a GAAP and non-GAAP basis for the fourth quarter was computed using approximately 31.3 million weighted average shares outstanding.

Now turning to the balance sheet, as of March 31, 2010, our cash and investments balance was $33.9 million, compared with $40.4 million at December 31, 2009. The $6.5 million sequential decrease in cash and investments included approximately $4.2 million of cash used in operations and $2.3 million in cash payments related to the acquisition of MagnaLynx. In addition, during the quarter, UBS redeemed $2.4 million of our auction-rate securities at par. We expect to redeem our remaining $6.7 million of auction-rate securities at par on July 1, 2010.

As Len mentioned, MoSys acquired MagnaLynx on March 25, 2010 for a total purchase price of approximately $5 million. Under the terms of the acquisition agreement, MoSys agreed to pay $3.5 million in cash up front to the MagnaLynx shareholders and certain creditors. MoSys paid $2.3 million in the first quarter of 2010 and will pay an additional $1.2 million to shareholders in the second quarter of 2010. An additional $500,000 will be payable to the shareholders 18 months after the acquisition less amounts used to settle any post-closing clients. An earn-out amount of up to $1 million in cash will be paid to the shareholders subject to the attainment of specified milestones during the initial 12-month post-acquisition period. MoSys will operate MagnaLynx as a wholly owned subsidiary, MoSys Iowa Inc.

Accounts receivable at the end of the first quarter totaled $1.6 million, compared with $700,000 as of December 31, 2009. The increase in accounts receivable was primarily due to the timing of invoicing on licenses, including follow-on invoicing with the agreements that we signed in the fourth quarter. Unbilled contract receivables of approximately $600,000 primarily represent future billings under customer contracts assumed by MoSys upon the acquisitions of Prism MagnaLynx. Deferred revenue at the end of the first quarter was $2.3 million, compared with $2.7 million at December 31, 2009. Deferred revenue decreased sequentially as we recorded revenue from license signed late in the fourth quarter of 2009. The accrued expenses and other liabilities amount of approximately $3.1 million on our balance sheet includes the $1.2 million payable to the former shareholders of MagnaLynx.

As of March 31, 2010, our total headcount was 164 employees, which compared with 152 employees as of December 31, 2009. The sequential increase was primarily attributable to headcount increases in our engineering team, including five joining from the MagnaLynx acquisition. As of March 31, approximately 80% of our employees were in engineering and research and development.

This concludes my prepared remarks. At this time, we would like to open the call for a question and answer session. Please clearly state your name and company affiliation prior to asking your question. Operator?

(Operator Instructions) Our first question comes from the line of Gary Mobley with Benchmark. Please proceed, sir.

Hi, guys. I just wanted to start out by asking you about your second quarter outlook. I'm assuming given your commentary in your press release that you expect the revenue to post some sequential improvement?

Yes, Gary. During the first quarter, we had begun to recognize revenue on the significant 1T-SRAM license agreements we signed back in the fourth quarter, two of those, frankly, which closed in the month of December, late in the month of December. On a couple of those projects, we had some delay in getting going primarily caused on the customer front, which slowed down revenue recognition. We expect those to pick up in the second quarter. In addition, we saw a couple of deals in the first quarter slip into the second quarter. So our revenue from new bookings will be higher in the second quarter.

So I expect you'll see revenue up as we deliver on those agreements.

And could you comment about how you guys managed to backfill the backlog from the deals that closed late last year and where your backlog may stand right now with respect to license and revenue recognition?

Sure. The backlog remains pretty high or remained pretty high at March 31 as I said, primarily because we had some of those deals. We weren't able to take the revenue we had anticipated. For example, on one customer they just slowed down the commencement of the project while they were dealing with another aspect of the design. So we've got a pretty strong backlog. In addition, we picked up some future revenue that we'll be able to recognize from the MagnaLynx acquisition. They had one large customer arrangement in place.

As I'm sure you're aware, in acquisition accounting you take a pretty big haircut on deferred revenue. So we'll see some modest few hundred-thousand dollars of revenue from that arrangement come in, in the second quarter, maybe a little bit more in the third quarter. But the backlog remains pretty strong. As I said, we weren't able to take in all we thought we could in the first quarter, but we'll certainly improve in the second and third quarters.

Okay. And how would expect operating expenses to trend in the June quarter given the tape-out of bandwidth engine, and then as well, the five additional, I'm sorry, with the 12 additional employees?

As I probably said on the last call, I projected OpEx to push kind of in the high $7 million, closer to $8 million. I think looking at non-GAAP pulling back out all the amortization, acquisitions, stock-based comp, our non-GAAP combined expense, taking my COGS and my OpEx was about $7.3 million. I expect that will be obviously up in Q2.

We are planning the tape-out for the bandwidth engine to incur much of those expenses, and kind of end of June we'll see those costs hit. That's in excess of $1 million. A lot of the headcount was on board early in the quarter, so we did see the impact of that. But there should be, I'm hoping we can keep the costs within $300,000 to $500,000 incremental. We did have to add some additional CAD tool licenses, particularly with the level of activity, had to purchase some additional prime time licenses. As we're pushing forward, we've had to pull in some additional consulting help to assist on certain aspects of the project.

So I think you'll see it obviously increase, primarily driven by the tape-out, but not too bad.

Okay. So you would expect your quarterly revenue break-even level to be just north of $10 million?

On a non-GAAP basis?

Correct.

On a non-GAAP basis for the next quarter probably more between $9 million and $9.5 million.

Okay. I have a question for Len. Could you talk about the potential dollar opportunity, if not anything specific, an absolute dollar amount maybe relative to the 1T-SRAM opportunity? Could you talk about the opportunity for 1T-Flash?

Yes, we -- a year, year and a half ago, we pulled the 1T-Flash out of our sales hands, sales guys' hands because I was convinced that it wasn't robust enough. And we pretty much approached it like we approached the bandwidth engine that we stopped and studied with (inaudible) and stopped and studied with physics of what's going on is.

And we have not gone back to the sales force or gone back to any customers yet, although I do have to say there's been extraordinary interest in accessing 1T-Flash for a variety of reasons, not the least of which SST has been acquired now by Microchip. And they had provided some IT in the past that had to do with putting some flash capability, programmable flash capability in a few foundries. And they're now out of that, probably out of that business would be my guess.

Anyway, I think in this quarter if we find that it's as robust as we want it to be. And I mentioned in my comments that we should have a pretty good feel by the end of the quarter, and we go back to the market and sell it, I think we have the opportunity to do some stuff through the balance of the year that might run into the few millions, probably not as much as $10 million, but probably more than $1 million.

And it would seem to me that looking out in the next 18 months from, say, July 1 through the end of 2011, it could be a reasonably good business for us. It's an embedded flash and if it does what I'm hoping it's going to do, it'll be a preferred solution because it doesn't require maybe one additional mask or not more than two. In other words, if you built an ARM processor in silicon and you wanted to have programmable Flash, it might take one or not more than two additional masks, which is a huge improvement. So I think it has a very large amount of opportunity, but until we see and I'm satisfied with this robustness, Gary, we're going to be a little cautious.

Okay. Last question and I'll jump in the queue. What's the mix in royalty revenue between TSMC and your [games] partner?

TSMC and NEC are probably about, this quarter it was about 60% to 65% of total royalty revenue. We've definitely, I think as I said on the fourth quarter call and it continued in the first quarter and we've already seen the royalty report from TSMC for our second quarter revenue, we're seeing improved volume there and good results. On the NEC front, we did see a drop in the -- related to the part that they shipped to Nintendo.

Certainly, Nintendo had a phenomenal fourth quarter in Wii sales, but from our perspective and what NEC had shipped to Nintendo, we had already seen the benefit of that last year. So we definitely saw some adjustments in inventory and I expect we'll probably see that again in the numbers we'll recognize for the second quarter, as this does tend to be a slower season and obviously with the weather improving, less focus on gaming systems, et cetera.

All right, well, that's going to do it for me. Thanks, guys.

You're welcome.

(Operator Instructions) Your next question comes from the line of Joel Achramowicz with Blaylock Robert Van. Please proceed, sir.

Thank you very much. Gentlemen, good afternoon.

Hey, Joel.

Hey, Len and Jim, I wanted to ask you just I missed [Inter Op] but it would seem that considering the bandwidth engine and the focused market targeting that that would be an ideal show. Were you there? Were you attending the show or at least have bodies up there?

I don't believe we did. I know I heard our sales and marketing guys talking about it. We did not have a formal presence at the show. I think in the last month or so, we were at a couple of TSMC symposiums. They were having a couple in the US and one over in Asia, but we were not at Inter Op that I'm aware.

Okay. I can't remember exactly what -- when do you expect to sample the bandwidth engine, Len?

So we should the product tape out in this quarter and that would mean we're going to see some silicon and debug it, and assuming that we're not going to have anything that's any problems that go below the metal layers, which is a timing problem, which is probably not unreasonable, although I'd like to think we wouldn't even -- that we should be in a position to see some silicon, and then get into packages and do a lot of characterization on it in the early part of the fourth quarter.

And then I would think some time late in the fourth quarter, we would be in a position to sell a few products for money. And that's one of our goals around here is not how many, only that we'd like to sell some for money in the calendar year 2010. And we continue to believe that's an achievable goal.

Sure, and it's obviously -- but more ramping of production obviously in the first quarter of 2011.

Actually, because of the length of time it takes for the big enterprise guys to churn one of their products loose, it's hard for me to tell what the level of business we might do in 2011 is. But I've said on occasion and I'll say again I believe in 2012 more than half of our revenue is going to come from IC sales, not IP. And we have as a goal to exit this year with a minimum of three customers on sort of a sample order initial backlog so that we would be able to maybe satisfy three customers in this calendar year. We -- as we go into 2011, we're -- in this business of where this fits in the system, there's an ASIC and the ASIC competes with an FPGA or it competes with a family of application specific products.

I think that we're working closely with a few of the premier FPGA suppliers because chances are they'll be among the first guys to the market. And chances are, we'll be partnering with them heavily later in this quarter and next quarter. And so in 2011, if some of these FPGA based systems go to market, we're going to see a bit more revenue than I would have anticipated. In the old days, we would have only been an ASIC -- it would have only been ASIC based. And now, I think it's -- FPGAs are a reasonable solution for one level of a switch routing system or even a network interface card as well. So I think we have the opportunity for some early on business in 2011 with the FPGA guys. But I think we're looking at a serious ramp in 2012.

Very good, and what kind of, just a general back of the envelope, what kind of gross margin do you think -- this product might offer going forward?

This product should do 65% or better. This thing is a serious solution and a serious cost down strategy for the user and there should be an opportunity for our customer to strengthen his gross margin using our product, just as there should be an opportunity for us to have a good gross margin as well. So this is not a commodity product. This is a really system thought out solution.

Excellent. And what process node are you going to go out and first silicon?

The process node we're going after is, first is 65 nanometers and we had stated earlier on that the reason we went after that note, it's a very mature note and this is kind of an advanced circuit design. And we didn't want to have to fool around with debugging any process architecture. We just want to work on debugging our part. So product one will be at 65 nanometers. However, it's also [liable] that when the thing turns up in the beginning of 2012 we should be able to have silicon from two foundries so that we have multiple suppliers to allay our big customer's fears that we might not be able to provide adequate supply.

Understood, and that would make sense, and I understand what you're talking about in terms of the older node. That makes a lot of sense, Len. Well, hopefully -- oh, my last question is just, do we have any indication of any technical papers, trade press papers of any kind, or white papers, or anything that might -- or are you just keeping a pretty close control over the concept, the bandwidth engine, and just carefully perhaps describing it to prospects?

We have a fairly significant presentation that we go through for people and I do believe that we have three or four white papers that are now out. If you'd like to get copies of those, Joel, then give us a call. We'll send them to you.

Sounds great.

And I was saving it for the end, but today somewhere around the United States is an embedded systems conference going on, and a CTO from one of the top three or four switching, routing companies in the world was one of the keynote speakers. And his quotation at this meeting is, "We have thousands of independent operations going on, and getting them to memory and back again is an organizational problem. There's a cloud on the horizon for network processing because as networks get denser, we aren't going to be able to cope with the memory access needed."

And basically, what he's saying is exactly what we saw 18 months ago that the game is over for designing next generation systems using traditional commodity memory. It's just not the right answer, too much board space, too much power, not reliable, too many errors generated. It's all crying out now for somebody to look at the system and figure out what the right architecture going forward is and that is precisely what this bandwidth engine is.

Very good. I'm right in phase with you there. Good luck going forward, Len. We'll look forward to more information going forward.

Thank you very much, Joel.

(Operator Instructions) Your next question comes from the line of Mike Crawford with B Riley & Company. Please proceed.

Thank you. Just regarding this bandwidth engine, IC family. So you're taping out at 65 nanometers and how much does it cost to bring a chip like that to market all in?

Oh, that probably varies quite a bit. I think Jim will tell you that, what, maybe we're going to spend $10 million or $12 million on that chip this year.

That's correct.

So we'll probably spend $10 million or $12 million on that chip this year and maybe we spent $4 million or $5 million last year.

Okay, and so with the -- that would bring, what, your year end cash to around, what, $25 million, $20 million to $25 million?

Actually, we've talked, Mike, about our cash getting down as low as $20 million and we're paying a lot of attention, looking at that, and keeping an eye on it. So I think I'm keeping a close eye on the cash and we have four things that are on my mind all the time. One is a bandwidth engine tape-out. Two is an optimal relationship with our foundries. Three is making our sales goal for the year and four is watching that cash. And I'm probably old enough to be your grandfather. It's unlikely I'll forget about the cash.

Okay, and then I'm sorry, on this MagnaLynx acquisition, so there are revenues. I think you said you're expecting a few hundred thousand in revenues next quarter. What's the approximately annual revenue contribution you're expecting from MagnaLynx?

At this point, based on our preliminary estimate it's about $200,000 to $300,000 we're targeting.

Per quarter?

No, in total for the combined Q2, Q3.

That, Mike, would be the amount of business that was sitting on their backlog when we made the acquisition and it's not without probability that we'll get some more business aimed directly at that team. But right now, Jim is talking about what came with the deal.

Okay. So basically, you bought a design team?

Basically, we bought a team that's been messing around with lower powered SerDes for the last five or ten years and I'm going to say a little bit about that in closing. But one of the things -- we have a chip that's generating four times the performance for roughly two times the power and that's a magnificent achievement. But as this thing is more and more widely adopted and people stuff more and more of them into the board it isn't going to be good enough that we're four times the performance for 50% of the power or twice the power. We need to be thinking about driving a vector in the direction of lower power SerDes and we think these guys are very, very good at it.

Okay. Great. Thank you.

No problem. Thanks for talking to us.

(Operator Instructions) With no further questions in the queue, I would now like to turn the call back over to Mr. Perham for closing remarks. You may proceed, sir.

Okay. Thank you very much. So today, I have a little bit longer diatribe here at the end that I'd like to go through, but I think it's important because anybody on the call is clearly a close friend and partner. So what is going on here at MoSys? We concluded some time ago that operating MoSys simply as an IP supplier would not drive significant shareholder value in the long-term. In short, it would not provide us an exciting future.

Then we studied our IP and our capability, and we looked around to see where this capability and expertise could bring very serious value. And we found that that IP and capability directly applied to some serious design challenges facing the people that want to design and architect next generation switches, routers, and network interface cards. We saw that that market was being served by roughly somewhere around $1 billion to $1.5 billion a year QDR memories and RLDRAMS and they were basically commodity products that weren't -- had never been intended for this level of performance in this kind of a system.

So what did we decide our main thrust should be? And you'll hear more and more about this. Our intention is very simple. We intend to enable serial chip-to-chip communications at the board level. Now, serial chip-to-chip communications has been going on or serial communications has been going on across the backplane for a long time. But there's a number of problems with serial chip-to-chip communications down at the board level. So when we realized what our future was, was to enable this serial chip-to-chip communications, we said, okay, let's talk about what we have to do.

First off, the chip-to-chip link, the interface between the chips is very inefficient. So we spent a long time and we developed something called the GigaChip Interface. It's a CEI-11 compliant, highly efficient link protocol. Once you don't have any link problems, you need to start thinking that in future systems when there's no link efficiency issues people are going to start looking at latency, what's the roundtrip travel time for a signal. So with a highly efficient chip-to-chip protocol in place, that being GCI, future systems are going to start thinking about that.

We've been looking at this problem now for a year with the same people that have described this bandwidth engine. We won't say much about it today, but you can be sure we're going to say something bout it in the future. So that's the second thing that we thought about when we came into this -- an idea that we would go after this market. With a broader acceptance of the bandwidth engine into more and more applications, power is going to become more of an issue.

Because we have four times the performance for half the power, but when you take the board and stuff it, it's going to have -- you can problem in these routers today, you can replace -- one board replaces four boards. But if you load these boards then we're going to be generating more power because we have twice the power for four times the performance. So it's going to be an issue for our customers. They're going to be concerned about it.

So we acquired MagnaLynx. They've been working on lower power SerDes issues for the past several years and they're very, very good at it. And they're going to act as our lead as we drive to lower and lower power per unit of performance. It's four times the performance for two times the power is a great start, but it's only a start and you can count on us to get better. So that's the third thing we thought about before we laid a pencil on paper to create the part.

The fourth thing was the bandwidth engine shouldn't be mistaken for some kind of a commodity memory or a commodity product. It's a system thought out solution and is capable of performing compute engine tasks. Bandwidth engine one will be able to provide a variety of macro functions, logical processing on boards and bandwidth engine two will provide many, many more of the same. Finally, this bandwidth engine is going to have to survive as an enterprise-grade quality product. The product was designed with that in mind. It is designed for reliability and quality, and it doesn't depend solely on the process technology to achieve this.

It is not our intent to lay the entire need for reliability and quality off on fab partner. It is our intent to be able to track down and segregate construction issues, physics issues, and design marginality problems. A superbly close relationship with our foundry partner, which we have, should enable us to achieve absolute best in class reliability. So just backing away a minute, before we put a pencil on paper we addressed link efficiency. We took a look at what the next problem would be behind that. We took a look at the power. Then we took a look at what it's going to cost, what the problems are with the reliability of the product and we designed in reliability.

Additionally, we came up with a very advanced programmable built-in self-test engine, which will help us describe and segregate out what I call construction issues from physics issues, from design marginality issues. This is a serious solution for a serious business and we have a very strong roadmap to the future products behind it.

Closing, the total available market for the bandwidth engine family is dramatically larger than the TAM for our IP. Our goal, as I mentioned today, is to have more than 50% of our revenue from IC as opposed to IP in 2012. And in so doing, we will begin to drive greater and greater shareholder value.

Thank you guys for coming on the call and listening to us today. I would tell you that you will follow us carefully and closely. We're relatively on schedule. We are in the middle of verification, both time and in functional. We are cranking our enormous hours now. We're bringing in meals. There's people here 24 hours a day. We intend to take this baby out and we intend that it will work.

Thank you for your time and patience. Look forward to talking to you again soon. Bye now.

Thank you for your participation in today's conference. This concludes the presentation. You may now disconnect. Have a great day.